| PART |
Description |
Maker |
| 74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74LCX112SJ 74LCX112 74LCX112M 74LCX112MTC 74LCX112 |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
Fairchild Semiconductor, Corp.
http://
FAIRCHILD[Fairchild Semiconductor]
|
| AT29C512-9 AT29C512-90JU AT29C512-70TC AT29C512-15 |
High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PDIP32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PQCC32
High Speed CMOS Logic Quad 2-Input Exclusive-NOR Gates 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PDIP32
High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-SOIC -55 to 125
High Speed CMOS Logic Phase-Locked Loop with VCO and Lock Detector 16-SOIC -55 to 125
512K (64K x 8) 5-volt Only Flash Memory
512K 64K x 8 5-volt Only CMOS Flash Memory
|
Atmel, Corp.
Atmel Corp.
ATMEL[ATMEL Corporation]
|
| SMBJ5.0A SMBJ51A SMBJ17A SMBJ100A SMBJ78CA SMBJ6.0 |
Silicon Avalanche Diodes - 600W Surface Mount Transient Voltage Suppressors
High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets 16-CDIP -55 to 125
High Speed CMOS Logic Dual 4-Stage Static Shift Register 16-CDIP -55 to 125
CMOS Dual 4-Bit Latch 24-SO -55 to 125
High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
High Speed CMOS Logic Analog Multiplexers/Demultiplexers 16-CDIP -55 to 125
High Speed CMOS Logic 14-Stage Binary Counter with Oscillator 16-CDIP -55 to 125
CMOS Dual BCD Up-Counter 16-SOIC -55 to 125
High Speed CMOS Logic 10-to-4 Line Priority Encoder 16-CDIP -55 to 125
High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125
Replaced by VSP2560 : 10-bit, 21 MSPS 1-Channel AFE for CCD Sensors 48-TQFP
Silicon Avalanche Diodes - 600W Surface Mount Transient Voltage Suppressors 硅雪崩二极管- 600W表面贴装瞬态电压抑制器
CMOS Dual Monostable Multivibrator 16-TSSOP -55 to 125 硅雪崩二极管- 600W表面贴装瞬态电压抑制器
|
http://
LITTELFUSE[Littelfuse]
Littelfuse, Inc.
|
| AS7C251MFT32_36A AS7C251MFT32A AS7C251MFT32A-10TQC |
2.5V 1M x 32/36 Flow-through synchronous SRAM
Sync SRAM - 2.5V
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125
DIODE ZENER SINGLE 1000mW 20Vz 12.5mA-Izt 0.05 5uA-Ir 15.2Vr DO41-GLASS 5K/AMMO
DIODE ZENER SINGLE 1000mW 30Vz 8.5mA-Izt 0.05 5uA-Ir 22.8Vr DO41-GLASS 5K/AMMO
DIODE ZENER SINGLE 1000mW 39Vz 6.5mA-Izt 0.05 5uA-Ir 29.7Vr DO41-GLASS 5K/REEL
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 1M X 32 STANDARD SRAM, 7.5 ns, PQFP100
2.5V 1M x 32/36 Flow-through synchronous SRAM 1M X 32 STANDARD SRAM, 7.5 ns, PQFP100
2.5V 1M x 32/36 Flow-through synchronous SRAM 1M X 32 STANDARD SRAM, 8.5 ns, PQFP100
2.5V 1M x 32/36 Flow-through synchronous SRAM 1M X 32 STANDARD SRAM, 10 ns, PQFP100
2.5V 1M x 32/36 Flow-through synchronous SRAM 1M X 36 STANDARD SRAM, 10 ns, PQFP100
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-TSSOP -55 to 125 2.5V00万x 32/36流通过同步SRAM
|
Alliance Semiconductor ...
ALSC[Alliance Semiconductor Corporation]
Alliance Semiconductor, Corp.
|
| SN74LS114D SN54LS114J SN74LS114N SN54LS114A SN5474 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
|
| PO74G112ATR PO74G112ATU PO74G112ASU PO74G112ASR |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
|
Potato Semiconductor Corporation
|
| 74F113 I74F113D I74F113N N74F113D N74F113N 74F113_ |
From old datasheet system
Dual J-K negative edge-triggered flip-flops without reset
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| 74LS73PC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
|
FAIRCHILD SEMICONDUCTOR CORP
|
| 74ACT11112 |
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 具有清零和预设功能的双路 J-K 下降沿触发器
|
Linear Technology, Corp.
|
