PART |
Description |
Maker |
ISPXPGA ISPXPGA1200 ISPXPGA1200E ISPXPGA125 ISPXPG |
ispXPGA Family
|
Lattice Semiconductor
|
BBS-15 BBS-1/4 BBS-2/10 BBS-1-8/10 BBS-10 BBS-1-6/ |
72-Mbit QDR-II SRAM 2-Word Burst Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit DDR-II SRAM 2-Word Burst Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 36-Mbit QDR-II SRAM 4-Word Burst Architecture Fuse 256K (32K x 8) Static RAM 64/256/512/1K/2K/4K x 18 Synchronous FIFOs Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Neuron® Chip Network Processor 64-Kbit (8K x 8) Static RAM 72-Mbit QDR™-II SRAM 2-Word Burst Architecture 保险
|
NXP Semiconductors N.V.
|
CY7C1303AV25-100BZC CY7C1306AV25-100BZC CY7C1303AV |
Memory : Sync SRAMs 18-Mb Burst of 2 Pipelined SRAM with QDR(TM) Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR⑩ Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR?/a> Architecture
|
Cypress Semiconductor
|
PRESENTATION |
Presentation - AMDNext Generation Microprocessor Architecture AMDs Next Generation Microprocessor Architecture
|
Advanced Micro Devices
|
CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
CY7C1302DV25-167BZC CY7C1302DV25-167BZI CY7C1302DV |
9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR垄芒 Architecture 9-Mbit Burst of Two Pipelined SRAMs with QDR⑩ Architecture
|
Cypress Semiconductor
|
CY7C1550KV18-450BZC CY7C1550KV18-400BZC CY7C1548KV |
Sync SRAM; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165 72-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor, Corp.
|
CY7C1315CV18-200BZC CY7C1315CV18-250BZC |
18-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V 512K X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
CY7C1355B-117BGI CY7C1355B-117BZC CY7C1355B-117BGC |
9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 9 - MB的(256 × 36/512K × 18)流体系结构,通过与总线延迟静态存储器 9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 256K X 36 ZBT SRAM, 7.5 ns, PBGA165 9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 256K X 36 ZBT SRAM, 6.5 ns, PBGA165 9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 256K X 36 ZBT SRAM, 7 ns, PQFP100
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
CY7C1303AV18-167BZC CY7C1306AV18-167BZC CY7C1303AV |
18-Mb Burst of 2 Pipelined SRAM with QDR(TM) Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR Architecture 18-Mb Burst of 2 Pipelined SRAM with QDR垄芒 Architecture
|
Cypress Semiconductor
|
CY7C1354CV25-225AXI CY7C1354CV25-167AXI CY7C1356CV |
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL Architecture 9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18)流水线的SRAM的总线延迟TM架构 9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18)流水线的SRAM的总线延迟,TM架构
|
Cypress Semiconductor Corp.
|