| PART |
Description |
Maker |
| MC74HC109 ON1335 |
Dual J-K Flip-Flop with Set and Rest
From old datasheet system
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
Motorola, Inc
ON Semi
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| 74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位（带设置和复位的双触发器）
|
ONSEMI[ON Semiconductor]
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| MC74HC74AD MC74HC74ADT MC74HC74AN |
Dual D Flip-Flop with Set and Reset
|
Motorola, Inc
|
| IN74VHCT74N IN74VHCT74 IN74VHCT74D |
Dual D Flip-Flop with Set and Reset
|
INTEGRAL[Integral Corp.]
|
| MC74HC74ADG MC74HC74ADR2G MC74HC74ADTR2G MC74HC74A |
Dual D Flip-Flop with Set and Reset
|
ON Semiconductor
|
| IN74ACT112N IN74ACT112 IN74ACT112D |
DUAL J-K FLIP-FLOP WITH SET AND RESET 双JK触发器与SET和RESET
|
INTEGRAL JOINT STOCK COMPANY
INTEGRAL[Integral Corp.]
|
| MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
| MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D?Type Flip?Flop with Set and Reset
Dual D−Type Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
