| PART |
Description |
Maker |
| CAT64LC10ZJ CAT64LC10ZP CAT64LC10J-TE7 CAT64LC10J- |
18-Mbit QDR™-II SRAM 4-Word Burst Architecture
18-Mbit DDR-II SRAM 2-Word Burst Architecture
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
4-Mbit (256K x 18) Flow-Through Sync SRAM SPI串行EEPROM
SPI Serial EEPROM SPI串行EEPROM
|
Analog Devices, Inc.
|
| CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V1 |
1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1518KV18-300BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1250V18-300BZI CY7C1246V18-333BZI CY7C1246V18- |
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的DDR - II SRAM2字突发架构（2.0周期读写延迟
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 1M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1423JV18-250BZXC |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 2M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1427AV18-250BZI |
36-Mbit DDR-II SRAM 2-Word Burst Architecture 4M X 9 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1418BV18-278BZC CY7C1418BV18-278BZI CY7C1418BV |
36-Mbit DDR-II SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1170V18-300BZXI CY7C1170V18-300BZC CY7C1170V18 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 512K X 36 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1916JV18-300BZXI CY7C1916JV18-300BZC CY7C1916J |
18-Mbit DDR-II SRAM 2-Word Burst Architecture
|
Cypress Semiconductor
|
| CY7C1916BV18-250BZC CY7C1316BV18 CY7C1316BV18-167B |
18-Mbit DDR-II SRAM 2-Word Burst Architecture
|
CYPRESS[Cypress Semiconductor]
|
| CY7C1318CV18-200BZI CY7C1318CV18-200BZXC CY7C1318C |
18-Mbit DDR II SRAM 2-Word Burst Architecture
|
Cypress Semiconductor
|
