PART |
Description |
Maker |
LTC3718 |
Low Input Voltage, DC/DC Controller for DDR/QDR Memory Termination
|
Linear Technology
|
PTHXX060Y PTH03060Y PTH05060Y PTH05060YAD PTH05060 |
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module
|
ARTESYN[Artesyn Technologies] Emerson Network Power
|
LTC3717-1 LTC3717EUH-1 |
Wide Operating Range, No RSENSE TM Step-Down Controller for DDR/QDR Memory Termination
|
Linear Technology
|
IDT70P3307S233RM IDT70P3307S233RMI IDT70P3307S250R |
1024K/512K x18 SYNCHRONOUS DUAL QDR-II 1M X 18 QDR SRAM, 0.45 ns, PBGA576
|
Integrated Device Technology, Inc.
|
CY7C1412BV18-167BZXI CY7C1414BV18-167BZXI |
36-Mbit QDR-IISRAM 2-Word Burst Architecture 1M X 36 QDR SRAM, 0.5 ns, PBGA165
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
CAT93C46AJ CAT93C46AJI CAT93C46AJI-2.5 CAT93C46AJ- |
72-Mbit QDR-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 72-Mbit QDR-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 256K (32K x 8) Static RAM 256 Kb (256K x 1) Static RAM 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) Microwire Serial EEPROM 微型导线串行EEPROM
|
Atmel, Corp.
|
CY7C1163V18-400BZC |
18-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
LTC3413EFETRPBF LTC3413IFETR LTC3413IFEPBF LTC3413 |
3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination; Package: TSSOP; No of Pins: 16; Temperature Range: -40°C to 85°C 7.2 A SWITCHING REGULATOR, 2000 kHz SWITCHING FREQ-MAX, PDSO16 3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination; Package: TSSOP; No of Pins: 16; Temperature Range: -40°C to 125°C 7.2 A SWITCHING REGULATOR, 2000 kHz SWITCHING FREQ-MAX, PDSO16
|
LINEAR TECHNOLOGY CORP Linear Technology, Corp.
|
CY7C1412BV18-250BZC |
2MX18 QDR-II BURST 2 SRAM 2M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
IDT72T40108L6-7BB IDT72T40118L6-7BB IDT72T40118L6- |
64K x 40 TeraSync DDR FIFO, 2.5V 128K x 40 TeraSync DDR FIFO, 2.5V 2.5 VOLT HIGH-SPEED TeraSync?? DDR/SDR FIFO 40-BIT CONFIGURATION 16K x 40 TeraSync DDR FIFO, 2.5V 32K x 40 TeraSync DDR FIFO, 2.5V
|
IDT
|
IDT71P74104S167BQ IDT71P74804S250BQ IDT71P74604S20 |
18Mb Pipelined QDR II SRAM Burst of 4 2M X 9 QDR SRAM, 0.5 ns, PBGA165 18Mb Pipelined QDR II SRAM Burst of 4 1M X 18 QDR SRAM, 0.45 ns, PBGA165 18Mb Pipelined QDR II SRAM Burst of 4 512K X 36 QDR SRAM, 0.45 ns, PBGA165 18Mb Pipelined QDR II SRAM Burst of 4 2M X 8 QDR SRAM, 0.5 ns, PBGA165
|
Integrated Device Technology, Inc. INTEGRATED DEVICE TECHNOLOGY INC
|