| PART |
Description |
Maker |
| IDT2309-1HPG IDT2309-1HDCG IDT2309-1DCG IDT2309-1H |
3.3V ZERO DELAY CLOCK BUFFER Phase-Lock Loop Clock Distribution
|
Integrated Device Technology
|
| ICS93735 ICS93735F-T |
DDR Phase Lock Loop Zero Delay Clock Buffer
|
ICS
Integrated Circuit Systems
|
| MXD1013 MXD1013PA MXD1013PD MXD1013SA MXD1013SE MX |
3-in-1 silicon delay line. Output delay 45ns.
3-in-1 silicon delay line. Output delay 30ns.
3-in-1 silicon delay line. Output delay 90ns.
3-in-1 silicon delay line. Output delay 12ns.
3-in-1 silicon delay line. Output delay 25ns.
Silver Mica Capacitor; Capacitance:11pF; Capacitance Tolerance: 1pF; Series:CD4; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:2.5mm; Leaded Process Compatible:No RoHS Compliant: No
3-in-1 silicon delay line. Output delay 70ns.
3-in-1 silicon delay line. Output delay 75ns.
3-in-1 silicon delay line. Output delay 50ns.
3-in-1 silicon delay line. Output delay 20ns.
3-in-1 silicon delay line. Output delay 80ns.
3-in-1 silicon delay line. Output delay 15ns.
|
Maxim Integrated Products, Inc.
MAXIM[Maxim Integrated Products]
Maixm
MAXIM - Dallas Semiconductor
|
| IDT23S09E-1PGI IDT23S09E-1HPG IDT23S09E-1HDC IDT23 |
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE 23S SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE 3.3零延迟时钟缓冲器，扩频兼
|
Integrated Device Technology, Inc.
|
| ASM5I23S05AG-1-08-SR ASM5I23S09AF-1-16-SR ASM5I23S |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
|
PulseCore Semiconductor
|
| 1503 1503J 1503-100A 1503-100B 1503-100C 1503-120B |
Max delay 35 ns, Mechanically variable delay line
Max delay 250 ns, Mechanically variable delay line
Max delay 150 ns, Mechanically variable delay line
Max delay 130 ns, Mechanically variable delay line
Max delay 80 ns, Mechanically variable delay line
Max delay 60 ns, Mechanically variable delay line
Max delay 50 ns, Mechanically variable delay line
Max delay 40 ns, Mechanically variable delay line
Max delay 30 ns, Mechanically variable delay line
Max delay 25 ns, Mechanically variable delay line
Max delay 20 ns, Mechanically variable delay line
Max delay 200 ns, Mechanically variable delay line
Max delay 160 ns, Mechanically variable delay line
Max delay 15 ns, Mechanically variable delay line
Max delay 140 ns, Mechanically variable delay line
Max delay 120 ns, Mechanically variable delay line
Max delay 100 ns, Mechanically variable delay line
Mechanically variable passive delay line
|
Data Delay Devices Inc
|
| CY23FS08OXC CY23FS08OXCT CY23FS08OXIT CY23FS0811 C |
Failsafe 2.5 V/3.3 V Zero Delay Buffer
Failsafe™ 2.5V/ 3.3V Zero Delay Buffer 166.7 MHz, OTHER CLOCK GENERATOR, PDSO28
Failsafe?2.5 V/3.3 V Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| 1507 1507-100A 1507-100B 1507-100C 1507-150A 1507- |
Delay 50 /-2.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 300 /-15 ns, 10-TAP SIP delay line Td/Tr=5
Delay 200 /-10 ns, 10-TAP SIP delay line Td/Tr=5
Delay 250 /-13 ns, 10-TAP SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 100 /-5 ns, 10-TAP SIP delay line Td/Tr=5
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits 固定10抽头延迟线被动园
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits
Delay 40 /-2 ns, 10-TAP SIP delay line Td/Tr=5
Delay 500 /-25 ns, 10-TAP SIP delay line Td/Tr=5
Delay 20 /-2 ns, 10-TAP SIP delay line Td/Tr=5
|
Data Delay Devices Inc
|
| CY2305CSXI-1T CY2305CSXI-1HT CY2305CSXC-1HT |
3.3V Zero Delay Clock Buffer 2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| NB2308AC3DG NB2308AC5HDTR2G NB2308AI3DG NB2308AC3D |
3.3V Eight Output Zero Delay Buffer; Package: SOIC 16 LEAD; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3 V Zero Delay Clock Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
ONSEMI[ON Semiconductor]
|
| UPD424400LLA-A80 UPD42S4400LLA-A80 UPD42S4400LGS-A |
2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer
Clock Synthesizer with Differential SRC and CPU Outputs
Clock Generator for Intel® Grantsdale Chipset
x4 Fast Page Mode DRAM x4快速页面模式的DRAM
|
Vishay Intertechnology, Inc.
|
