| PART |
Description |
Maker |
| AS7C33512PFD18A-133TQCN AS7C33512PFD18A-133TQIN AS |
3.3V 512K x 18 pipeline burst synchronous SRAM 512K X 18 STANDARD SRAM, 4.5 ns, PQFP100
3.3V 512K x 18 pipeline burst synchronous SRAM 512K X 18 STANDARD SRAM, 4 ns, PQFP100
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Alliance Semiconductor, Corp.
Alliance Semiconductor Corp...
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| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| AS5SP512K36DQ AS5SP512K36DQ-30ET AS5SP512K36DQ-30I |
Plastic Encapsulated Microcircuit 18Mb, 512K x 36, Synchronous SRAM Pipeline Burst, Single Cycle Deselect
|
Austin Semiconductor
|
| GS88118 GS88136 GS88118GT-11IT GS88118GT-11.5IT GS |
512K x 18, 256K x 36 ByteSafe?/a> 8Mb Sync Burst SRAMs
512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
512K x 18, 256K x 36 ByteSafe8Mb Sync Burst SRAMs
8Mb锛?12K x 18Bit) ByteSafe Synchronous Burst SRAM(8M浣??512K x 18浣??ByteSafe??????RAM锛?甫2浣???插?????板?锛?
512K X 18 CACHE SRAM, 11.5 ns, PQFP100 TQFP-100
512K X 18 CACHE SRAM, 11 ns, PQFP100 TQFP-100
8Mb56K x 36Bit)ByteSafe Synchronous Burst SRAM(8M位（256K x 36位）ByteSafe同步静态RAM（带2位脉冲地址计数器）)
8Mb12K x 18Bit) ByteSafe Synchronous Burst SRAM(8M位（512K x 18位）ByteSafe同步静态RAM（带2位脉冲地址计数器）)
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GSI Technology, Inc.
|
| IS61LPD51218T/D IS61LPD25632T/D IS61SPD25632T/D IS |
256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, DOUBLE-CYCLE DESELECT STATIC RAM 256K × 3256K × 3612K采样× 18 SYNCHRONOU?管道，双循环取消选择静态RAM
256K X 36 CACHE SRAM, 3.5 ns, PQFP100 TQFP-100
256K x 32/ 256K x 36/ 512K x 18 SYNCHRONOUS PIPELINE/ DOUBLE-CYCLE DESELECT STATIC RAM
|
Integrated Silicon Solution, Inc.
Integrated Silicon Solution Inc
|
| AS7C3364PFD32-36BV.1.1 AS7C3364PFD36B-200TQIN AS7C |
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 3 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 3.5 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 3 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 4 ns, PQFP100
From old datasheet system
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| IS61NVVP51236-200BI IS61NVVP51236-250B IS61NVVP512 |
256K x 72 and 512K x 36, 18Mb PIPELINE (NO WAIT) STATE BUS SRAM 512K X 36 ZBT SRAM, 3 ns, PBGA119
256K x 72 and 512K x 36, 18Mb PIPELINE (NO WAIT) STATE BUS SRAM 512K X 36 ZBT SRAM, 2.6 ns, PBGA119
|
Integrated Silicon Solution, Inc.
|
| GS832218B-133 GS832218B-133I GS832218B-150 GS83221 |
64K 3.3 VOLT SERIAL CONFIGURATION PROM 200万1800万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
GIGABASE 350 CAT5E PATCH 1 FT, SNAGLESS, WHITE 200万1800万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 200万18100万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 200万1800万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 200万1800万36，为512k × 72分配36MBS /双氰胺同步突发静态存储器
DIODE, ZENER, 4.3V, 0.5W, 5%, -65-175C, DO-35
(GS832218 / GS832236 / GS832272) S/DCD Sync Burst SRAMs
|
ETC
Electronic Theatre Controls, Inc.
List of Unclassifed Manufacturers
List of Unclassifed Man...
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| IS61NVP25636A-200TQI IS61NLP25636A-200B2I IS61NLP2 |
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 256K X 36 ZBT SRAM, 3.1 ns, PQFP100
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 256K X 36 ZBT SRAM, 3.1 ns, PBGA119
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 256K X 36 ZBT SRAM, 2.6 ns, PQFP100
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 256K X 36 ZBT SRAM, 2.6 ns, PBGA119
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 512K X 18 ZBT SRAM, 3.1 ns, PBGA165
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 512K X 18 ZBT SRAM, 2.6 ns, PBGA165
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 512K X 18 ZBT SRAM, 2.6 ns, PBGA119
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 512K X 18 ZBT SRAM, 3.1 ns, PBGA119
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 512K X 18 ZBT SRAM, 2.6 ns, PQFP100
256K x 36 and 512K x 18 9Mb, PIPELINE (NO WAIT) STATE BUS SRAM 512K X 18 ZBT SRAM, 3.1 ns, PQFP100
256K X 36 ZBT SRAM, 3.1 ns, PBGA165
|
Integrated Silicon Solution, Inc.
INTEGRATED SILICON SOLUTION INC
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| GS88019AT-133 GS88019AT-133I GS88019AT-150I GS8801 |
512K X 18 CACHE SRAM, 3.5 ns, PQFP100
250MHz 512K x 18 9Mb sync burst SRAM
225MHz 512K x 18 9Mb sync burst SRAM
200MHz 512K x 18 9Mb sync burst SRAM
166MHz 512K x 18 9Mb sync burst SRAM
150MHz 512K x 18 9Mb sync burst SRAM
133MHz 512K x 18 9Mb sync burst SRAM
150MHz 256K x 32 9Mb sync burst SRAM
166MHz 256K x 32 9Mb sync burst SRAM
225MHz 256K x 32 9Mb sync burst SRAM
250MHz 256K x 32 9Mb sync burst SRAM
133MHz 256K x 36 9Mb sync burst SRAM
150MHz 256K x 36 9Mb sync burst SRAM
166MHz 256K x 36 9Mb sync burst SRAM
200MHz 256K x 36 9Mb sync burst SRAM
225MHz 256K x 36 9Mb sync burst SRAM
133MHz 256K x 32 9Mb sync burst SRAM
200MHz 256K x 32 9Mb sync burst SRAM
250MHz 256K x 36 9Mb sync burst SRAM
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GSI Technology
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