| PART |
Description |
Maker |
| GTLP6C817 GTLP6C817MTCX |
Low Drive GTLP-to-LVTTL 1:6 Clock Driver; Package: TSSOP; No of Pins: 24; Container: Tape & Reel GTLP SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
Low Drive GTLP/LVTTL 1:6 Clock Driver
|
Fairchild Semiconductor, Corp.
|
| 74GTLP816_DATASHEET IDT74GTLP816 |
From old datasheet system
GTLP/TTL 1:2/1:6 CLOCK DRIVER
|
IDT
|
| MC100H646 MC10H646 ON0802 |
From old datasheet system
PENTIUM MICROPROCESSOR PECL/TTL-TTL CLOCK DRIVER
|
ONSEMI[ON Semiconductor]
|
| IDT74GTLP16612 IDT74GTLP16612PA IDT74GTLP16612PV I |
CMOS 18-BIT TTL/GTLP UNIVERSAL BUS TRANSCEIVER
|
IDT
Integrated Device Technology
|
| SC3508Q/TD SC3508Q/D SC3508Q-1/D SC3508Q-1/TD |
20-OUTPUT CLOCK DRIVER TTL SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
|
Applied Micro Circuits Corp.
Applied Micro Circuits, Corp.
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC10H645-D |
1:9 TTL Clock Driver
|
ON Semiconductor
|
| MC10H645 ON0801 |
From old datasheet system
1:9 TTL CLOCK DRIVER
|
ONSEMI[ON Semiconductor]
|
| MC10H64206 MC10H642FNR2 MC10H642FNR2G MC10H642FNG |
68030/040 PECL to TTL Clock Driver
|
ONSEMI[ON Semiconductor]
|
| MC10H64306 MC10H643FNR2G MC100H643 MC100H643FN MC1 |
Dual Supply ECL to TTL 1:8 Clock Driver
|
ONSEMI[ON Semiconductor]
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
| MC100H642 MC10H642 ON0798 |
From old datasheet system
68030/040 PECL-TTL CLOCK DRIVER
|
ONSEMI[ON Semiconductor]
|
