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CY7C1371D - 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture(18-Mb (512K x 36/1M x 18)流通式SRAM(NoBL结构 18兆位(为512k × 36/1M × 18)流体系结构,通过与总线延迟18 MB的(12k × 36/1M × 18)流通式的SRAM(总线延迟结构)的SRAM

CY7C1371D_5468906.PDF Datasheet

 
Part No. CY7C1371D
Description 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture(18-Mb (512K x 36/1M x 18)流通式SRAM(NoBL结构 18兆位(为512k × 36/1M × 18)流体系结构,通过与总线延迟18 MB的(12k × 36/1M × 18)流通式的SRAM(总线延迟结构)的SRAM

File Size 417.22K  /  28 Page  

Maker

Cypress Semiconductor Corp.



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Part: CY7C1371D-100AXC
Maker: Cypress Semiconductor Corp
Pack: ETC
Stock: Reserved
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 Full text search : 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture(18-Mb (512K x 36/1M x 18)流通式SRAM(NoBL结构 18兆位(为512k × 36/1M × 18)流体系结构,通过与总线延迟18 MB的(12k × 36/1M × 18)流通式的SRAM(总线延迟结构)的SRAM


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