| PART |
Description |
Maker |
| SI53102-A2 |
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER
|
Silicon Laboratories
|
| ICS952606FLFT |
Programmable Timing Control Hub for Next Gen P4 processor
|
Integrated Circuit Systems
|
| ICS952601 952601YGLFT 952601YFLFT |
Programmable Timing Control HubTM for Next Gen P4TM Processor
|
Integrated Device Technology
|
| ERB12-02 ERB12-06 ERB12-01 |
GEN PURPOSE DIODE 根目的二极管
|
Electronics Industry Public Company Limited
|
| 9DB423BFLF 9DB423BGLFT 9DB423BFLFT |
Four Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI
|
Integrated Device Technology
|
| DS1100 |
5-Tap Economy Timing Element (Delay Line) All-Silicon Timing Circuit
|
Maxim Integrated Products
|
| XCR5032C DS046 |
with Enhanced Clocking
From old datasheet system
|
Xilinx
|
| XCR3128A-10TQ128C XCR3128A-10TQ128I XCR3128A-10VQ1 |
CPLD with Enhanced Clocking EE PLD, 10 ns, PQFP100
|
Xilinx, Inc.
XILINX[Xilinx, Inc]
|
| XCR5064C-1 XCR5064C-10PC44I XCR5064C-10VQ44I XCR50 |
64 Macrocell CPLD with Enhanced Clocking EE PLD, 12 ns, PQCC44
|
Xilinx, Inc.
XILINX[Xilinx, Inc]
|
| SYS-4U4000-4A05-14 |
3rd Gen Intel? Core?i7/i5/i3 4U 4A053rd Gen Intel? Core?i7/i5/i3 4U
|
Advantech Co., Ltd.
|
| ASM3I623S05AG-08-SR ASM3P623S05AG-08-SR ASM3I623S0 |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
Timing-Safe?/a> Peak EMI reduction IC
Timing-Safe Peak EMI reduction IC
Timing-Safe垄芒 Peak EMI reduction IC
|
http://
PulseCore Semiconductor
|
