PART |
Description |
Maker |
5962F9863501VXC 5962F9863501VCC 5962F9863501V9A AC |
3-line to 8-line decoder / demultiplexer 16-SOIC 0 to 70 Contact Protector; Weight:163g Radiation Hardened Quad D-Type Flip-Flop
with Reset(抗辐射四D触发器(带复位功能)) Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16 Radiation Hardened Quad D-Type Flip- Flop with Reset
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Intersil Corporation Intersil, Corp.
|
HMC749LC3C11 |
26 GHz, T FLIP-FLOP w/ RESET, PROGRAMMABLE OUTPUT VOLTAGE & POSITIVE SUPPLY
|
Hittite Microwave Corporation
|
MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
74ACT174 74AC174 74ACT174SJX 74AC174MTC 74AC174SCX |
Hex D Flip-Flop with Master Reset From old datasheet system Hex D-Type Flip-Flop with Master Reset
|
Fairchild Semiconductor
|
74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 Dual JK flip-flop with reset; negative-edge trigger
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NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
74LVC1G74GD125 |
Single D-type flip-flop with set and reset; positive edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR 3.3V / 5VECL 8-Bit Serial/Parallel Converter Dual Binary 1-4-Decoder (High) 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset 9-Bit TTL-ECL Translator Quad TTL-ECL Translator Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate 3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter 3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable 3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock 5V ECL Voltage Controlled Oscillator 3.3V ECL D-Type Flip-Flop with Set and Reset Binary to 1-8 Decoder (Low) Differential -5V ECL To TTL Translator -3.3V / -5V Triple ECL Input to PECL Output Translator 5V ECL Dual Differential 2:1 Multiplexer Quad MSTR 5V ECL Quad 4-Input OR/NOR Gate 3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
74ALS109AN 74ALS109A 74ALS109AD |
Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
Rochester Electronics, LLC PHILIPS[Philips Semiconductors] NXP Semiconductors
|
MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 From old datasheet system Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
|
CD54ACT273A CD54AC273 CD54AC273A CD54ACT273 CD54AC |
Octal D Flip-Flop with Reset
|
Intersil Corporation HARRIS[Harris Corporation]
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