| PART |
Description |
Maker |
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| HD74HCT74A HD74HCT74AT HD74HCT74AFP |
Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|TSSOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|SOP|14PIN|PLASTIC
|
Hitachi,Ltd.
HITACHI[Hitachi Semiconductor]
|
| 74ACTQ574PC 74ACQ574 74ACQ574PC 74ACQ574SC 74ACQ57 |
Quiet Series Octal D Flip-Flop with 3-STATE Outputs
Quiet SeriesOctal D-Type Flip-Flop with 3-STATE Outputs
18-Bit LVTTL-to-GTLP Bus Transceiver with Source Synchronous Clock Outputs 56-TSSOP -40 to 85
Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs
Quiet Series⑩ Octal D-Type Flip-Flop with 3-STATE Outputs
From old datasheet system
|
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
| MC74AC74-D MC74ACT74MEL |
Dual D-Type Positive Edge-Triggered Flip-Flop
Dual D-Type Positive Edge Trigger Flip-Flop
|
ON Semiconductor
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| 74LVX112M 74LVX112MTC 74LVX112 74LVX112SJX |
J-K-Type Flip-Flop
Low Voltage Dual J-K Flip-Flops with Preset and Clear
From old datasheet system
|
FAIRCHILD[Fairchild Semiconductor]
|
| MC10135 MC10135FN MC10135L MC10135P ON0571 |
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Dual J-K Master-Slave Flip-Flop
PIN ASSIGNMENT
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
ONSEMI[ON Semiconductor]
|
| PI74STX1G79TX PI74STX1G79 PI74STX1G79CX |
FLIP-FLOP|SINGLE|D TYPE|CMOS|TSSOP|6PIN|PLASTIC 触发器|单| D型|的CMOS | TSSOP封装| 6针|塑料
SOTiny Gate STX Single Positive-Edge-Triggered D-Type Flip-Flop
|
Pericom Semiconductor, Corp.
PERICOM[Pericom Semiconductor Corporation]
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| 74ALVC16374 74ALVC16374GX 74ALVC16374MTD 74ALVC163 |
16-Bit D-Type Flip-Flop 16D型触发器
From old datasheet system
Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs
|
ON Semiconductor
Fairchild Semiconductor
|
