| PART |
Description |
Maker |
| ASM5I23S05AG-1-08-SR ASM5I23S09AF-1-16-SR ASM5I23S |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
|
PulseCore Semiconductor
|
| 1504 1504SERIES 1504-600F 1504-80B 1504-80C 1504-7 |
FIXED DIP DELAY LINE TD/TR = 5
Delay 20 /-1.0 ns, Fixed dip delay line Td/Tr=5
Delay 60 /-3 ns, Fixed dip delay line Td/Tr=5
Delay 800 /-40 ns, Fixed dip delay line Td/Tr=5
Delay 40 /-2 ns, Fixed dip delay line Td/Tr=5
Delay 400 /-20 ns, Fixed dip delay line Td/Tr=5
Delay 750 /-37.5 ns, Fixed dip delay line Td/Tr=5
Delay 225 /-12 ns, Fixed dip delay line Td/Tr=5
Delay 140 /-7 ns, Fixed dip delay line Td/Tr=5
Delay 100 /-5 ns, Fixed dip delay line Td/Tr=5
Delay 220 /-11 ns, Fixed dip delay line Td/Tr=5
Delay 380 /-19 ns, Fixed dip delay line Td/Tr=5
Delay 480 /-24 ns, Fixed dip delay line Td/Tr=5
Delay 120 /-6 ns, Fixed dip delay line Td/Tr=5
Delay 150 /-7.5 ns, Fixed dip delay line Td/Tr=5
Delay 450 /-22.5 ns, Fixed dip delay line Td/Tr=5
Delay 75 /-3.8 ns, Fixed dip delay line Td/Tr=5
Delay 360 /-18 ns, Fixed dip delay line Td/Tr=5
Delay 25 /-1.3 ns, Fixed dip delay line Td/Tr=5
Delay 250 /-12.5 ns, Fixed dip delay line Td/Tr=5
Fixed passive DIP delay line
PASSIVE DELAY LINE, TRUE OUTPUT, DIP16
Delay 160 /-8 ns, Fixed dip delay line Td/Tr=5
Delay 375 /-18.8 ns, Fixed dip delay line Td/Tr=5
Delay 50 /-2.5 ns, Fixed dip delay line Td/Tr=5
Delay 320 /-16 ns, Fixed dip delay line Td/Tr=5
Delay 90 /-4.5 ns, Fixed dip delay line Td/Tr=5
Delay 45 /-2.3 ns, Fixed dip delay line Td/Tr=5
Delay 1000 /-50 ns, Fixed dip delay line Td/Tr=5
Delay 10 /-1 ns, Fixed dip delay line Td/Tr=5
Delay 125 /-6.3 ns, Fixed dip delay line Td/Tr=5
Delay 30 /-1.5 ns, Fixed dip delay line Td/Tr=5
Delay 180 /-9 ns, Fixed dip delay line Td/Tr=5
Delay 500 /-25 ns, Fixed dip delay line Td/Tr=5
Delay 300 /-15 ns, Fixed dip delay line Td/Tr=5
Delay 200 /-10 ns, Fixed dip delay line Td/Tr=5
Delay 240 /-12 ns, Fixed dip delay line Td/Tr=5
Delay 80 /-4 ns, Fixed dip delay line Td/Tr=5
Delay 600 /-30 ns, Fixed dip delay line Td/Tr=5
|
Data Delay Devices, Inc...
DATA DELAY DEVICES INC
|
| CY23FS08-04 CY23FS08OXI-04 CY23FS08OXI-04T |
133 MHz, OTHER CLOCK GENERATOR, PDSO28 5.30 MM, LEAD FREE, SSOP-28
FailSafe⑩ 1.8V Zero Delay Buffer
FailSafe 1.8V Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| SI53106 |
SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER
|
Silicon Laboratories
|
| 2020-900 2020-1400 2021-200 2021-250 2020-700 2021 |
Delay 900 /-18 ns, fixed SIP delay line Tr
Delay 1400 /-28 ns, fixed SIP delay line Tr
Delay 200 /-10 ns, fixed SIP delay line Tr
Delay 250 /-10 ns, fixed SIP delay line Tr
Delay 700 /-14 ns, fixed SIP delay line Tr
Delay 100 /-10 ns, fixed SIP delay line Tr
Delay 150 /-10 ns, fixed SIP delay line Tr
Delay 500 /-10 ns, fixed SIP delay line Tr
Delay 1300 /-26 ns, fixed SIP delay line Tr
|
Data Delay Devices Inc
|
| CY23EP05SXI-1T CY23EP05SXC-1HT CY23EP05SXI-1HT CY2 |
2.5 V or 3.3 V,10-220-MHz, Low Jitter, 5 Output Zero Delay Buffer
2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
Cypress Semiconductor, Corp.
|
| ICS2309 ICS2309G-1H ICS2309G-1HLF ICS2309G-1HLFT I |
3.3 VOLT ZERO DELAY / LOW SKEW BUFFER
3.3 Volt Zero Delay, Low Skew Buffer
From old datasheet system
|
ICST[Integrated Circuit Systems]
|
| 1503 1503J 1503-100A 1503-100B 1503-100C 1503-120B |
Max delay 35 ns, Mechanically variable delay line
Max delay 250 ns, Mechanically variable delay line
Max delay 150 ns, Mechanically variable delay line
Max delay 130 ns, Mechanically variable delay line
Max delay 80 ns, Mechanically variable delay line
Max delay 60 ns, Mechanically variable delay line
Max delay 50 ns, Mechanically variable delay line
Max delay 40 ns, Mechanically variable delay line
Max delay 30 ns, Mechanically variable delay line
Max delay 25 ns, Mechanically variable delay line
Max delay 20 ns, Mechanically variable delay line
Max delay 200 ns, Mechanically variable delay line
Max delay 160 ns, Mechanically variable delay line
Max delay 15 ns, Mechanically variable delay line
Max delay 140 ns, Mechanically variable delay line
Max delay 120 ns, Mechanically variable delay line
Max delay 100 ns, Mechanically variable delay line
Mechanically variable passive delay line
|
Data Delay Devices Inc
|
| W132 W132-09BX W132-10BX |
Spread Aware(TM)-designed to work with SSFTG reference signals
Spread Aware?, Ten/Eleven Output Zero Delay Buffer
SPREAD AWARE, TEN/ELEVEN OUTPUT ZERO DELAY BUFFER
|
Cypress
|
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
|
|
| 1507 1507-100A 1507-100B 1507-100C 1507-150A 1507- |
Delay 50 /-2.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 300 /-15 ns, 10-TAP SIP delay line Td/Tr=5
Delay 200 /-10 ns, 10-TAP SIP delay line Td/Tr=5
Delay 250 /-13 ns, 10-TAP SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 100 /-5 ns, 10-TAP SIP delay line Td/Tr=5
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits 固定10抽头延迟线被动园
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits
Delay 40 /-2 ns, 10-TAP SIP delay line Td/Tr=5
Delay 500 /-25 ns, 10-TAP SIP delay line Td/Tr=5
Delay 20 /-2 ns, 10-TAP SIP delay line Td/Tr=5
|
Data Delay Devices Inc
|
|
