PART |
Description |
Maker |
K4D26323AA-GL |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
HI-8684PST-10 HI-8683 HI-8683PJI HI-8683PJT HI-868 |
ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 8-BIT PARALLEL DATA 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN (HI-8683 / HI-8684) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 8-BIT PARALLEL DATA ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 8-BIT PARALLEL DATA System component for interfacing incoming ARINC 429 signals to 8-bit parallel data
|
http:// HOLTIC[Holt Integrated Circuits] HOLT INTEGRATED CIRCUITS INC Holt Integrated Circuit...
|
MC74HC354DW MC54_74HC354 ON1412 MC54HC354 MC74HC35 |
8-Input Data Selector/Multiplexer With Data and Address Latches and 3-State Outputs 8-INPUT DATA SELECTOR/MULTLPLEXER WLTH DATA AND ADDRESS LATCHER AND 3-STATE OUTPUTS From old datasheet system
|
Motorola, Inc. ON Semi MOTOROLA[Motorola, Inc]
|
W9751G6KB-18 W9751G6KB-25 W9751G6KB-3 W9751G6KB25A |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
AD1801JST |
1400 kbps DATA, MODEM-DATA/FAX/VOICE, PQFP128 TQFP-128
|
Analog Devices, Inc.
|
K4D263238M K4D263238M-QC45 K4D263238M-QC50 K4D2632 |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL
|
Samsung Electronic SAMSUNG[Samsung semiconductor]
|
HI-8788PQTF HI-8787 HI-8787_06 HI-8787PQI HI-8787P |
ARINC INTERFACE DEVICES 16 bit parallel data converted to 429 & 561 serial data out
|
HOLTIC[Holt Integrated Circuits]
|
HI-878306 |
ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out
|
Holt Integrated Circuits
|
MX929BDS MX929B MX929BP MX929BDW |
DATA BULLETIN 4-Level FSK Modem Data Pump
|
CMLMICRO[CML Microcircuits]
|
SDA006 SDA006-7 |
Data Line Protection DATA BUS TRANSIENT SUPPRESSOR/3-PHASE FULL WAVE BRIDGE RECTIFIER
|
Dionics Inc. DIODES[Diodes Incorporated]
|
W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
W9412G2IB W9412G2IB4 W9412G2IB-6I |
1M × 4 BANKS × 32 BITS GDDR SDRAM Double Data Rate architecture; two data transfers per clock cycle 4M X 32 DDR DRAM, 0.7 ns, PBGA144
|
Winbond WINBOND ELECTRONICS CORP
|