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ADLE3800SEC-E3827 - Edge-Connect Architecture

ADLE3800SEC-E3827_8955723.PDF Datasheet


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CY7C1350F CY7C1350F-100AC CY7C1350F-100AI CY7C1350 4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture 128K X 36 ZBT SRAM, 2.8 ns, PBGA119
4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture 128K X 36 ZBT SRAM, 4.5 ns, PQFP100
4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture 128K X 36 ZBT SRAM, 2.6 ns, PBGA119
4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture 128K X 36 ZBT SRAM, 2.6 ns, PQFP100
CABLE ASSEMBLY; LEAD-FREE SOLDER; SMA MALE TO SMA MALE; 50 OHM, PE-SR047FL (.047" RE-SHAPABLE) 128K X 36 ZBT SRAM, 3.5 ns, PQFP100
4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture 128K X 36 ZBT SRAM, 2.8 ns, PQFP100
4-Mb (128K x 36) Pipelined SRAM with Nobl(TM) Architecture
Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
CY7C1474BV33-200BGC 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 1M X 72 ZBT SRAM, 3 ns, PBGA209
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CY7C1561KV18 CY7C1561KV18-400BZC CY7C1561KV18-400B 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.29 ns, PBGA165
72-Mbit QDR-II SRAM 4-Word Burst Architecture
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EDG0308 EDG0408 GSM0308 GSM0408 GSM0306 Utilizes leading-edge GSM/GPRS/EDGE silicon
List of Unclassifed Manufacturers
CY7C1514KV18 CY7C1514KV18-300BZXC CY7C1512KV18-300 72-Mbit QDR II SRAM 2-Word Burst Architecture Two-word burst on all accesses
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 QDR SRAM, 0.45 ns, PBGA165
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
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CY7C1568KV18-550BZXC 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
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UPD4264405G5-A50-7JD UPD4265405G5-A50-7JD UPD42S65 2-Mbit (128K x 18) Flow-Through SRAM with NoBL™ Architecture
x4 EDO Page Mode DRAM
512K (32K x 16) Static RAM
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128K x 8 Static RAM 128K的8静态RAM
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CY7C1550KV18-450BZC CY7C1550KV18-400BZC CY7C1548KV Sync SRAM; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
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CY7C1350 7C1350 128Kx36 Pipelined SRAM with NoBL Architecture(带NoBL结构28Kx36流水线式 SRAM) 128K × 36至流水线与总线延迟静态存储器体系结构(带总线延迟结构28K × 36至流水线式的SRAM
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From old datasheet system
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CY7C1305AV18 CY7C1305AV18-100BZC CY7C1305AV18-133B 18-Mb Burst of 4 Pipelined SRAM with QDR(TM) Architecture
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CY7C1305BV25 CY7C1305BV25-100BZC CY7C1305BV25-167B 18-Mbit Burst of 4 Pipelined SRAM with QD(TM) Architecture
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From old datasheet system
CYPRESS[Cypress Semiconductor]
 
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