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INTEGRATED CIRCUITS
DATA SHEET
74AHC2G125; 74AHCT2G125 Bus buffer/line driver; 3-state
Product specification 2004 Jan 13
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
FEATURES * Symmetrical output impedance * High noise immunity * ESD protection: - HBM EIA/JESD22-A114-A exceeds 2000 V - MM EIA/JESD22-A115-A exceeds 200 V - CDM EIA/JESD22-C101 exceeds 1000 V. * Low power dissipation * Balanced propagation delays * SOT505-2 and SOT765-1 package * Specified from-40 to +85 C and -40 to +125 C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 3.0 ns.
74AHC2G125; 74AHCT2G125
DESCRIPTION The 74AHC2G/AHCT2G125 is a high-speed Si-gate CMOS device. The 74AHC2G/AHCT2G125 provides a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH at pin nOE causes the output to assume a high-impedance OFF-state.
TYPICAL SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL x VCC2 x fo) = sum of outputs. 2. The condition is VI = GND to VCC. PARAMETER propagation delay nA to nY input capacitance CONDITIONS AHC2G CL = 15 pF; VCC = 5 V 3.4 1.5 AHCT2G 3.4 1.5 11 ns pF pF UNIT
power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 9
2004 Jan 13
2
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. ORDERING INFORMATION nA L H X
74AHC2G125; 74AHCT2G125
OUTPUT nY L H Z
PACKAGE TYPE NUMBER 74AHC2G125DP 74AHCT2G125DP 74AHC2G125DC 74AHCT2G125DC PINNING PIN 1 2 3 4 5 6 7 8 1OE 1A 2Y GND 2A 1Y 2OE VCC SYMBOL data input data output ground (0 V) data input data output output enable input (active LOW) supply voltage DESCRIPTION output enable input (active LOW) TEMPERATURE RANGE -40 to +125 C -40 to +125 C -40 to +125 C -40 to +125 C PINS 8 8 8 8 PACKAGE TSSOP8 TSSOP8 VSSOP8 VSSOP8 MATERIAL plastic plastic plastic plastic CODE SOT505-2 SOT505-2 SOT765-1 SOT765-1 MARKING A25 C25 A25 C25
2004 Jan 13
3
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
handbook, halfpage handbook, halfpage
2 1OE 1 1A 2 8 VCC 7 2OE 1Y 2A 7 1
1A
1Y
6
1OE
125
2Y GND 3 4
MCE184
6 5
5
2A
2Y
3
2OE
MCE185
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
2 6 1 5 3 7 2OE
MCE186
1OE
handbook, halfpage
nA
nY
nOE
MCE187
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
2004 Jan 13
4
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
RECOMMENDED OPERATING CONDITIONS
74AHC2G125; 74AHCT2G125
74AHC2G125 SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times see DC and AC characteristics per device VCC = 3.3 0.3 V VCC = 5 0.5 V CONDITIONS MIN. 2.0 0 0 -40 - -
74AHCT2G125 UNIT TYP. MAX. 5.0 - - +25 - - 5.5 5.5 VCC V V V
TYP. MAX. MIN. 5.0 - - +25 - - 5.5 5.5 VCC 4.5 0 0
+125 -40 100 20 - -
+125 C - 20 ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC VI IIK IOK IO ICC, IGND Tstg Ptot Note 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. PARAMETER supply voltage input voltage input diode current output diode current output source or sink current VCC or GND current storage temperature power dissipation Tamb = -40 to +125 C VI < -0.5 V VO < -0.5 V or VO > VCC + 0.5 V; note 1 -0.5 V < VO < VCC + 0.5 V CONDITIONS MIN. MAX. UNIT -0.5 -0.5 - - - - -65 - +7.0 +7.0 -20 20 25 75 250 V V mA mA mA mA mW
+150 C
2004 Jan 13
5
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
DC CHARACTERISTICS
74AHC2G125; 74AHCT2G125
Type 74AHC2G125 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). CONDITIONS SYMBOL Tamb = 25 C VIH HIGH-level input voltage 2.0 3.0 5.5 VIL LOW-level input voltage 2.0 3.0 5.5 VOH HIGH-level output voltage VI = VIH or VIL IO = -50 A IO = -50 A IO = -50 A IO = -4.0 mA IO = -8.0 mA VOL LOW-level output voltage VI = VIH or VIL IO = 50 A IO = 50 A IO = 50 A IO = 4.0 mA IO = 8.0 mA IOZ ILI ICC CI 3-state output OFF-state current input leakage current quiescent supply current input capacitance VI = VCC or GND VI = VCC or GND VI = VCC or GND; IO = 0 2.0 3.0 4.5 3.0 4.5 5.5 5.5 5.5 - - - - - - - - - - 0 0 0 - - - - - 1.5 0.1 0.1 0.1 0.36 0.36 0.25 0.1 1.0 10 V V V V V A A A pF 2.0 3.0 4.5 3.0 4.5 1.9 2.9 4.4 2.58 3.94 2.0 3.0 4.5 - - - - - - - V V V V V 1.5 2.1 3.85 - - - - - - - - - - - - 0.5 0.9 1.65 V V V V V V PARAMETER OTHER VCC (V) MIN. TYP. MAX. UNIT
2004 Jan 13
6
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +85 C VIH HIGH-level input voltage 2.0 3.0 5.5 VIL LOW-level input voltage 2.0 3.0 5.5 VOH HIGH-level output voltage VI = VIH or VIL IO = -50 A IO = -50 A IO = -50 A IO = -4.0 mA IO = -8.0 mA VOL LOW-level output voltage VI = VIH or VIL IO = 50 A IO = 50 A IO = 50 A IO = 4.0 mA IO = 8.0 mA IOZ ILI ICC CI 3-state output OFF-state current input leakage current quiescent supply current input capacitance VI = VCC or GND VI = VCC or GND VI = VCC or GND; IO = 0 2.0 3.0 4.5 3.0 4.5 5.5 5.5 5.5 - - - - - - - - - - - - - - - - - - - 0.1 0.1 0.1 0.44 0.44 2.5 1.0 10 10 V V V V V A A A pF 2.0 3.0 4.5 3.0 4.5 1.9 2.9 4.4 2.48 3.8 - - - - - - - - - - V V V V V 1.5 2.1 3.85 - - - - - - - - - - - - 0.5 0.9 1.65 V V V V V V VCC (V) MIN. TYP. MAX. UNIT
2004 Jan 13
7
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +125 C VIH HIGH-level input voltage 2.0 3.0 5.5 VIL LOW-level input voltage 2.0 3.0 5.5 VOH HIGH-level output voltage VI = VIH or VIL IO = -50 A IO = -50 A IO = -50 A IO = -4.0 mA IO = -8.0 mA VOL LOW-level output voltage VI = VIH or VIL IO = 50 A IO = 50 A IO = 50 A IO = 4.0 mA IO = 8.0 mA IOZ ILI ICC CI 3-state output OFF-state current input leakage current quiescent supply current input capacitance VI = VCC or GND VI = VCC or GND VI = VCC or GND; IO = 0 2.0 3.0 4.5 3.0 4.5 5.5 5.5 5.5 - - - - - - - - - - - - - - - - - - - 0.1 0.1 0.1 0.55 0.55 10 2.0 40 10 V V V V V A A A pF 2.0 3.0 4.5 3.0 4.5 1.9 2.9 4.4 2.40 3.70 - - - - - - - - - - V V V V V 1.5 2.1 3.85 - - - - - - - - - - - - 0.5 0.9 1.65 V V V V V V VCC (V) MIN. TYP. MAX. UNIT
2004 Jan 13
8
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
Type 74AHCT2G125 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). CONDITIONS SYMBOL Tamb = 25 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = -50 A IO = -8.0 mA VOL LOW-level output voltage VI = VIH or VIL IO = 50 A IO = 8.0 mA IOZ ILI ICC ICC CI 3-state output OFF-state current input leakage current quiescent supply current VI = VCC or GND VI = VIH or VIL VI = VCC or GND; IO = 0 4.5 4.5 5.5 5.5 5.5 5.5 - - - - - - - 0 - - - - - 1.5 - - - - - - - - - - - 0.1 0.36 0.25 0.1 1.0 1.35 10 - 0.8 - - 0.1 0.44 2.5 1.0 10 1.5 10 V V A A A mA pF 4.5 4.5 4.4 3.94 4.5 - - - V V 4.5 to 5.5 4.5 to 5.5 2.0 - - - - 0.8 V V PARAMETER OTHER VCC (V) MIN. TYP. MAX. UNIT
additional quiescent supply VI = 3.4 V; other inputs at current per input pin VCC or GND; IO = 0 input capacitance
Tamb = -40 to +85 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = -50 A IO = -8.0 mA VOL LOW-level output voltage VI = VIH or VIL IO = 50 A IO = 8.0 mA IOZ ILI ICC ICC CI 3-state output OFF-state current input leakage current quiescent supply current VI = VCC or GND VI = VIH or VIL VI = VCC or GND; IO = 0 4.5 4.5 5.5 5.5 5.5 5.5 - - - - - - - - V V A A A mA pF 4.5 4.5 4.4 3.8 V V 4.5 to 5.5 4.5 to 5.5 2.0 - V V
additional quiescent supply VI = 3.4 V; other inputs at current per input pin VCC or GND; IO = 0 input capacitance
2004 Jan 13
9
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +125 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = -50 A IO = -8.0 mA VOL LOW-level output voltage VI = VIH or VIL IO = 50 A IO = 8.0 mA IOZ ILI ICC ICC CI 3-state output OFF-state current input leakage current quiescent supply current VI = VCC or GND VI = VIH or VIL VI = VCC or GND; IO = 0 4.5 4.5 5.5 5.5 5.5 5.5 - - - - - - - - - - - - - - - 0.1 0.55 10 2.0 40 1.5 10 V V A A A mA pF 4.5 4.5 4.4 3.70 - - - - V V 4.5 to 5.5 4.5 to 5.5 2.0 - - - - 0.8 V V VCC (V) MIN. TYP. MAX. UNIT
additional quiescent supply VI = 3.4 V; other inputs at current per input pin VCC or GND; IO = 0 input capacitance
2004 Jan 13
10
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
AC CHARACTERISTICS Type 74AHC2G125 GND = 0 V; tr = tf 3.0 ns.
74AHC2G125; 74AHCT2G125
TEST CONDITIONS SYMBOL Tamb = 25 C VCC = 3.0 to 3.6 V; note 1 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 - - - - - - - - - - - - 4.7 5.0 6.0 6.6 6.9 8.3 8.0 8.0 9.7 11.5 11.5 13.2 ns ns ns ns ns ns PARAMETER WAVEFORMS CL (pF) MIN. TYP. MAX. UNIT
VCC = 4.5 to 5.5 V; note 2 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 3.4 3.6 4.1 4.8 4.9 5.7 5.5 5.1 6.8 7.5 7.5 8.8 ns ns ns ns ns ns
Tamb = -40 to +85 C VCC = 3.0 to 3.6 V; note 1 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 1.0 1.0 1.0 1.0 1.0 1.0 - - - - - - - - - - - - 9.5 9.5 11.5 13.0 13.0 15.0 ns ns ns ns ns ns
VCC = 4.5 to 5.5 V; note 2 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 1.0 1.0 1.0 1.0 1.0 1.0 6.5 6.0 8.0 8.5 8.5 10.0 ns ns ns ns ns ns
2004 Jan 13
11
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
TEST CONDITIONS SYMBOL Tamb = -40 to +125 C VCC = 3.0 to 3.6 V; note 1 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 1.0 1.0 1.0 1.0 1.0 1.0 - - - - - - - - - - - - 11.5 11.5 12.5 14.5 14.5 16.5 ns ns ns ns ns ns PARAMETER WAVEFORMS CL (pF) MIN. TYP. MAX. UNIT
VCC = 4.5 to 5.5 V; note 2 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ Notes 1. All typical values are measured at VCC = 3.3 V. 2. All typical values are measured at VCC = 5.0 V. Type 74AHCT2G125 GND = 0 V; tr = tf 3.0 ns. TEST CONDITIONS SYMBOL Tamb = 25 C VCC = 4.5 to 5.5 V; note 1 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 - - - - - - 3.4 3.9 4.5 4.8 5.1 6.1 5.5 5.1 6.8 7.5 7.5 8.8 ns ns ns ns ns ns PARAMETER WAVEFORMS CL (pF) MIN. TYP. MAX. UNIT propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 1.0 1.0 1.0 1.0 1.0 1.0 7.0 6.5 8.5 9.5 9.5 11.0 ns ns ns ns ns ns
Tamb = -40 to +85 C VCC = 4.5 to 5.5 V tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH 2004 Jan 13 propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 12 15 15 15 50 1.0 1.0 1.0 1.0 - - - - 6.5 6.0 8.0 8.5 ns ns ns ns
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
TEST CONDITIONS SYMBOL tPZH/tPZL tPHZ/tPLZ PARAMETER WAVEFORMS propagation delay nOE to nY propagation delay nOE to nY see Figs 6 and 7 see Figs 6 and 7 CL (pF) 50 50 1.0 1.0 - - 8.5 10.0 ns ns MIN. TYP. MAX. UNIT
Tamb = -40 to +125 C VCC = 4.5 to 5.5 V tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPHL/tPLH tPZH/tPZL tPHZ/tPLZ Note 1. All typical values are measured at VCC = 5.0 V. AC WAVEFORMS propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY propagation delay nA to nY propagation delay nOE to nY propagation delay nOE to nY see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 see Figs 5 and 7 see Figs 6 and 7 see Figs 6 and 7 15 15 15 50 50 50 1.0 1.0 1.0 1.0 1.0 1.0 - - - - - - 6.5 6.0 8.0 8.5 8.5 10.0 ns ns ns ns ns ns
handbook, halfpage
VI VM GND tPHL VOH tPLH
nA input
nY output VOL
VM
MNA230
FAMILY AHC2G125 AHCT2G125
VI INPUT REQUIREMENTS GND to VCC GND to 3.0 V
VM INPUT 50% VCC 1.5 V
VM OUTPUT 50% VCC 50% VCC
Fig.5 The input (nA) to output (nY) propagation delays.
2004 Jan 13
13
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
handbook, full pagewidth
VI OE input GND tPLZ VCC output LOW-to-OFF OFF-to-LOW tPHZ output HIGH-to-OFF OFF-to-HIGH GND output enabled output disabled output enabled
MNA122
VM
tPZL
VM VOL +0.3 V tPZH VOH -0.3 V VM
FAMILY AHC2G125 AHCT2G125
VI INPUT REQUIREMENTS GND to VCC GND to 3.0 V
VM INPUT 50% VCC 1.5 V
VM OUTPUT 50% VCC 50% VCC
Fig.6 The 3-state enable and disable times.
handbook, full pagewidth
S1 VCC PULSE GENERATOR VI D.U.T. RT CL
MNA232
VO
RL = 1000
VCC open GND
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH open VCC GND
S1
Definitions for test circuit: RL = load resistance. CL = load capacitance including jig and probe capacitance (see Chapter "AC characteristics" for the value). RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.7 Load circuitry for switching times.
2004 Jan 13
14
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
PACKAGE OUTLINES
74AHC2G125; 74AHCT2G125
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c y HE vMA
Z
8
5
A pin 1 index
A2 A1
(A3)
Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 8 0
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16
2004 Jan 13
15
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
74AHC2G125; 74AHCT2G125
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A X
c y HE vMA
Z
8
5
Q A pin 1 index A2 A1 (A3) Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 8 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION
ISSUE DATE 02-06-07
2004 Jan 13
16
Philips Semiconductors
Product specification
Bus buffer/line driver; 3-state
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development
74AHC2G125; 74AHCT2G125
DEFINITION This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2004 Jan 13
17
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R44/01/pp18
Date of release: 2004
Jan 13
Document order number:
9397 750 12426

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