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INTEGRATED CIRCUITS 74LV125 Quad buffer/line driver (3-State) Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 28 Philips Semiconductors Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 FEATURES * Wide operating voltage: 1.0 to 5.5 V * Optimized for Low Voltage applications: 1.0 to 3.6 V * Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V * Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, * Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, * Output capability: bus driver * ICC category: MSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25C; tr = tf 2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA to nY Input capacitance Power dissipation capacitance per buffer Tamb = 25C. Tamb = 25C. DESCRIPTION The 74LV125 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT125. The 74LV125 consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high impedance OFF-state. CONDITIONS CL = 15 pF; VCC = 3.3 V VCC = 3.3 V; VI = GND to VCC1 TYPICAL 9 3.5 22 UNIT ns pF pF NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in W) PD = CPD x VCC2 x fi ) (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL x VCC2 x fo) = sum of the outputs. ORDERING INFORMATION PACKAGES 14-Pin Plastic DIL 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C OUTSIDE NORTH AMERICA 74LV125 N 74LV125 D 74LV125 DB 74LV125 PW NORTH AMERICA 74LV125 N 74LV125 D 74LV125 DB 74LV125PW DH PKG. DWG. # SOT27-1 SOT108-1 SOT337-1 SOT402-1 PIN DESCRIPTION PIN NUMBER 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11 7 14 SYMBOL 1OE - 4OE 1A - 4A 1Y - 4Y GND VCC NAME AND FUNCTION FUNCTION TABLE INPUTS nOE Data enable inputs (active LOW) Data inputs Data Outputs Ground (0 V) Positive supply voltage L L H NOTES: H = HIGH voltage level L = LOW voltage level X = don't care Z = high impedance OFF-state nA L H X OUTPUT nY L H Z 1998 Apr 28 2 853-1901 19290 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 PIN CONFIGURATION 1OE 1A 1Y 2OE 2A 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 4OE 4A 4Y LOGIC SYMBOL (IEEE/IEC) 2 1 3 1 EN1 5 6 4 3OE 3A 3Y 9 8 10 12 11 13 SV00455 LOGIC SYMBOL 2 1A 1Y 3 SV00457 1 5 1OE 2A 2Y 6 4 9 2OE 3A 3Y 8 10 12 3OE 4A 4Y 11 13 4OE SV00456 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb Input voltage Output voltage Operating ambient temperature range in free air See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V PARAMETER DC supply voltage CONDITIONS See Note 1 MIN 1.0 0 0 -40 -40 - - - - - - - - TYP 3.3 - - MAX 5.5 VCC VCC +85 +125 500 200 100 50 UNIT V V V C tr, tf Input rise and fall times ns/V NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V. 1998 Apr 28 3 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC "IIK "IOK "IO "IGND, "ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current - bus driver outputs DC VCC or GND current for types with - bus driver outputs Storage temperature range Power dissipation per package - plastic DIL - plastic mini-pack (SO) - plastic shrink mini-pack (SSOP and TSSOP) for temperature range: -40 to +125C above +70C derate linearly with 12 mW/K above +70C derate linearly with 8 mW/K above +60C derate linearly with 5.5 mW/K VI < -0.5 or VI > VCC + 0.5V VO < -0.5 or VO > VCC + 0.5V -0.5V < VO < VCC + 0.5V CONDITIONS RATING -0.5 to +7.0 20 50 35 70 -65 to +150 750 500 400 UNIT V mA mA mA mA C mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions, voltages are referenced to GND (ground = 0 V) LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2 V VIH HIGH level Input voltage VCC = 2.0 V VCC = 2.7 to 3.6 V VCC = 4.5 to 5.5 V VCC = 1.2 V VIL LOW level Input voltage VCC = 2.0 V VCC = 2.7 to 3.6 V VCC = 4.5 to 5.5 VCC = 1.2 V; VI = VIH or VIL; -IO = 100A VCC = 2.0 V; VI = VIH or VIL; -IO = 100A VOH HIGH l level output ltt voltage out uts voltage; all outputs VCC = 2.7 V; VI = VIH or VIL; -IO = 100A VCC = 3.0 V; VI = VIH or VIL; -IO = 100A VCC = 4.5 V; VI = VIH or VIL; -IO = 100A VOH HIGH level output voltage; BUS driver outputs VCC = 3.0 V; VI = VIH or VIL; -IO = 8mA VCC = 4.5 V; VI = VIH or VIL; -IO = 16mA VCC = 1.2 V; VI = VIH or VIL; IO = 100A VCC = 2.0 V; VI = VIH or VIL; IO = 100A VOL LOW l level output ltt voltage out uts voltage; all outputs VCC = 2.7 V; VI = VIH or VIL; IO = 100A VCC = 3.0 V; VI = VIH or VIL; IO = 100A VCC = 4.5 V; VI = VIH or VIL; IO = 100A VOL LOW level output voltage; BUS driver outputs VCC = 3.0 V; VI = VIH or VIL; IO = 8mA VCC = 4.5 V; VI = VIH or VIL; IO = 16mA 1.8 2.5 2.8 4.3 2.40 3.60 1.2 2.0 2.7 3.0 4.5 2.82 4.20 0 0 0 0 0 0.20 0.35 0.2 0.2 0.2 0.2 0.40 0.55 0.2 0.2 0.2 0.2 0.50 V 0.65 V 1.8 2.5 2.8 4.3 2.20 V 3.50 V 0.9 1.4 2.0 0.7 4 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 DC ELECTRICAL CHARACTERISTICS (Continued) Over recommended operating conditions, voltages are referenced to GND (ground = 0 V) LIMITS SYMBOL PARAMETER Input leakage current 3-State output OFF-state current Quiescent supply current; MSI Additional quiescent supply current per input TEST CONDITIONS MIN II IOZ ICC ICC VCC = 5.5 V; VI = VCC or GND VCC = 5.5 V; VI = VIH or VIL; VO = VCC or GND VCC = 5.5 V; VI = VCC or GND; IO = 0 VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V -40C to +85C TYP1 MAX 1.0 5 20.0 500 -40C to +125C MIN MAX 1.0 10 160 850 A A A A UNIT NOTE: 1. All typical values are measured at Tamb = 25C. AC CHARACTERISTICS GND = 0V; tr = tf 2.5ns; CL = 50pF; RL = 1K SYMBOL PARAMETER WAVEFORM CONDITION VCC(V) 1.2 2.0 tPHL/tPLH Propagation delay nA to nY Figures 1, 2 2.7 3.0 to 3.6 4.5 to 5.5 1.2 tPZH/tPZL 3 State out ut 3-State output enable time OE to Y nOE t nY 2.0 Figures 2, 3 2.7 3.0 to 3.6 4.5 to 5.5 1.2 tPHZ/tPLZ 3 State out ut 3-State output disable time nOE t nY OE to Y 2.0 Figures 2, 3 2.7 3.0 to 3.6 4.5 to 5.5 NOTES: 1. Unless otherwise stated, all typical values are measured at Tamb = 25C 2. Typical values are measured at VCC = 3.3 V. 65 24 18 142 32 24 20 17 39 29 24 21 ns 75 26 19 142 31 23 18 15 39 29 23 19 ns MIN LIMITS -40 to +85 C TYP1 55 19 14 102 24 18 14 12 31 23 18 15 ns MAX -40 to +125 C MIN MAX UNIT 1998 Apr 28 5 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 AC WAVEFORMS VM = 1.5 V at VCC 2.7 V and 3.6 V; VM = 0.5 x VCC at VCC < 2.7 V and 4.5 V. VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3 V at VCC 2.7 V and 3.6 V; VX = VOL + 0.1 x VCC at VCC < 2.7 V and 4.5 V. VY = VOH - 0.3 V at VCC 2.7 V and 3.6 V; VY = VOH - 0.1 VCC at VCC < 2.7 V and 4.5 V. Vl nA INPUT GND t PHL V OH nY OUTPUT V OL VM t PLH VM TEST CIRCUIT VCC 2 * VCC Open GND VO D.U.T. RT CL 50 pF RL = 1k RL = 1k VI PULSE GENERATOR Test Circuit for Outputs DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitiance. RT = Termination resistance should be equal to ZOUT of pulse generators. SWITCH POSITION SV00459 TEST tPLH/tPHL tPLZ/tPZL S1 Open 2 * VCC GND VCC < 2.7V 2.7-3.6V w 4.5V VI VCC 2.7V VCC Figure 1. Input (nA) to output (nY) propagation delays and output transition times. VI nOE Input GND tPLZ VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL tPHZ VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled VY VM outputs disabled outputs enabled tPZL VM VX tPZH VM tPHZ/tPZH SV00896 Figure 3. Load circuitry for switching times. SV00458 Figure 2. 3-state enable and disable times. 1998 Apr 28 6 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 1998 Apr 20 7 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 1998 Apr 20 8 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 1998 Apr 20 9 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 1998 Apr 20 10 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 NOTES 1998 Apr 20 11 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-04419 Philips Semiconductors 1998 Apr 20 12 |
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