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74VHC4040 12-Stage Binary Counter
August 1993 Revised April 1999
74VHC4040 12-Stage Binary Counter
General Description
The VHC4040 is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHC4040 is a 12-stage counter which increments on the negative edge of the input clock and all outputs are reset to a low level by applying a logical high on the reset input. An input protection circuit insures that 0V to 7V can be applied to the inputs without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages.
Features
s High speed; fMAX = 210 MHz at VCC = 5V s Low power dissipation: ICC = 4 A (max) at TA = 25C s High noise immunity: VNIH =VNIL = 28% VCC (min) s Power down protection is provided on all inputs s Wide operating voltage range: VCC (opr) = 2V - 5.5V s Low noise: VOLP = 0.8V (max) s Pin and function compatible with 74HC4040
Ordering Code:
Order Number 74VHC4040M 74VHC4040MTC 74VHC4040N Package Number M16A MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names Q0-Q11 CP MR Description Flip-Flop Outputs Negative Edged Triggered Clock Master Reset
(c) 1999 Fairchild Semiconductor Corporation
DS011641.prf
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74VHC4040
Logic Symbols
IEEE/IEC
Logic Diagram
Timing Diagram
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74VHC4040
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Input Diode Current (IIK) Output Diode Current (IOK) DC Output Current (IOUT) DC VCC /GND Current (ICC ) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260C -0.5V to +7.0V -0.5V to +7.0V -0.5V to VCC + 0.5V -20 mA 20 mA 25 mA 75 mA -65C to +150C
Recommended Operating Conditions (Note 2)
Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC = 3.3V 0.3V VCC = 5.0V 0.5V 0 100 ns/V 0 20 ns/V 2.0V to +5.5V 0V to +5.5V 0V to VCC -40C to +85C
Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 2: Unused inputs must be held HIGH or LOW. They may not float
DC Electrical Characteristics
Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage VCC (V) 2.0 3.0 - 5.5 2.0 3.0 - 5.5 2.0 3.0 4.5 3.0 4.5 VOL LOW Level Output Voltage 2.0 3.0 4.5 3.0 4.5 IIN ICC Input Leakage Current Quiescent Supply Current 0 - 5.5 5.5 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 0.1 4.0 2.0 3.0 4.5 TA = 25C Min 1.50 0.7 VCC 0.50 0.3 VCC 1.9 2.9 4.4 2.48 3.80 0.1 0.1 0.1 0.44 0.44 1.0 40.0 A A V VIN = VIH or VIL V VIN = VIH or VIL Typ Max TA = -40C to +85C Min 1.50 0.7 VCC 0.50 0.3 VCC Max Units V V IOH = -50 A Conditions
IOH = -4 mA IOH = -8 mA IOL = 50 A
IOL = 4 mA IOL = 8 mA
VIN = 5.5V or GND VIN = VCC or GND
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74VHC4040
AC Electrical Characteristics
Symbol tPLH tPHL Parameter Propagation Delay Time to Q1 5.0 0.5 tPLH tPHL Propagation Delay Time between Stages from Qn to Qn+1 tPHL Propagation Delay Time MR-Qn 5.0 0.5 fMAX Maximum Clock Frequency 5.0 0.5 CIN CPD Input Capacitance Power Dissipation Capacitance 3.3 0.3 90 55 150 95 5.0 0.5 1.6 3.3 0.3 8.3 10.8 5.6 7.1 140 80 210 125 4 21 10 3.1 12.8 16.3 8.6 10.6 1.0 1.0 1.0 1.0 1.0 75 50 125 80 10 3.5 15.0 18.5 10.0 12.0 3.3 0.3 2.4 4.4 1.0 5.0 VCC (V) 3.3 0.3 TA = +25C Min Typ 7.5 10.0 4.8 6.3 Max 11.9 15.4 7.3 9.3 TA = -40C to +85C Min 1.0 1.0 1.0 1.0 Max 14.0 17.5 8.5 10.5 Units ns ns ns ns ns ns MHz MHz pF pF Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF VCC = Open (Note 3)
Note 3: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD * VCC * fN + ICC.
AC Operating Requirements
Symbol tw(L) tw(H) tw(L) tREC Parameter Minimum Pulse Width (CP) Minimum Pulse Width (MR) Minimum Removal Time (MR) VCC (V) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 TA = 25C Typ 5.0 5.0 5.0 5.0 5.0 5.0 TA = -40C to +85C Guaranteed Minimum 5.0 5.0 5.0 5.0 5.0 5.0 Units
ns ns ns
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74VHC4040
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
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74VHC4040
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16
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74VHC4040 12-Stage Binary Counter
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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