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| CXA1310AQ Single Chip Processing for CCD Monochrome Camera Description The CXA1310AQ is designed to perform the basic signal processing in CCD monochrome cameras with a single chip. This bipolar lC is most suitable for compact usage and low power consumption. Features * Processing from CCD output to 75 video output with a single chip * Wide variable AGC (4 to 32dB Typ.) * Built-in operational amplifier for AGC loop * 75 line capacitance minimized using sag compensation function * Variable white clip level realize wide dynamic range (140 IRE) Application CCD monochrome camera 32 pin QFP (Plastic) Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25C) 7 V * Supply voltage VCC * Storage temperature Tstg -65 to +150 C * Operating temperature Topr -20 to +75 C * Allowable power dissipation PD 500 mW Operating Conditions Supply voltage VCC 4.75 to 5.25 V Block Diagram and Pin Configuration AGC CONT AGC MAX AGC OUT OP IN+ OP OUT HSD2 HSD1 CLP CLP2 SHP IN 25 24 21 20 14 16 12 11 10 17 18 OP IN- 24 23 22 21 20 19 18 17 CLP2 25 GND3 26 IRIS 27 16 AGC CONT PG 23 CLP2 S/H S/H S/H SHD2 SHP OP IN- PG OP OUT 15 VCC1 14 13 AGC MAX DET OUT 12 AGC OUT 11 IN 10 CLP 9 LINEAR 8 19 OP IN+ AGC DATA 22 GND3 26 IRIS 27 BLK CLP1 CLP2 S/H S/H CLP1 BLK 13 DET OUT IRIS CLP 28 BLK 29 CLP1 30 31 VCC2 VCC2 31 VIDEO 32 VCC1 15 1 GND1 3 2 CLP1 WC SETUP BLK DATA SHD1 SYNC DRIVE 32 VIDEO 1 2 SAG GND2 1 2 3 4 5 6 7 GND1 28 9 8 7 6 5 4 30 29 IRIS CLP OUT SET CONT WC CONT LINEAR SYNC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. DRIVER IN -1- CLP1 BLK SET CONT DRIVER IN WC CONT SYNC E89Z21A78-PS OUT GND2 SAG CXA1310AQ Pin Description No. Symbol I/O signal Equivalent circuit 10k Description 150 1 SAG Inputs VIDEO OUT through capacitor 1 150 6k 400A Input pin of sag compensation signal 2 3 GND2 GND1 GND GND GND for driver and IRIS GND for other than driver, sample hold and IRIS T 20A 4 SYNC High: 4.5V and above Low: 0.5V and below T: 5s 4 150 Sync pulse input pin (active at Low) Set-up level adjusting pin GND 5 Turns to preset mode 1 SET CONT 2 to 3.5V VCC 5 150 40A Control mode Turns to preset mode 2 White clip level adjusting pin 6 WC CONT GND 2 to 3.5V 6 150 40A Preset mode Control mode External applied voltage -2- CXA1310AQ No. Symbol I/O signal Equivalent circuit Description 7 DRIVER IN Input OUT through capacitor or LINEAR 7 Input pin to driver 40A Gamma correction signal output pin. 8 OUT DC 2V 480A 8 Outputs 1 when Pin 9 is at OPEN Outputs 2 when Pin 9 is turnedto 5V 150 Linear signal (-OFF signal) output pin 9 LINEAR VCC DC 1.8V 9 480A 15A Pin 8 output signal turns to 2 output 150 10 CLP 10 150 Capacitor connecting pin for gamma input clamp 150 11 IN 11 Input DC permissible range DC2 to 3V Input pin of the gamma correction circuit 80A 160A External applied voltage -3- CXA1310AQ No. Symbol I/O signal Equivalent circuit Description 700A 12 AGC OUT Vp-p MAX 1300mV Vp-p TYP 500mV DC 2.55V 12 Output pin of signal passed through AGC 13 DET OUT MAX TYP DC 1500mV 500mV 2V 320A 13 Output pin of AGC detection signal 20A 14 AGC MAX DC 14 150 Maximum gain setting pin of AGC amplifier 15 VCC1 5V Power supply for other than driver and IRIS 16 AGC CONT DC 16 150 120A Gain control pin of AGC amplifier 320A 17 OP OUT 17 Output pin of the operational amplifier External applied voltage -4- CXA1310AQ No. Symbol I/O signal Equivalent circuit Description 18 18 OP IN- 150 20A Inverted input pin of the operational amplifier 19 19 OP IN+ 150 20A Non inverted input pin of the operational amplifier (AGC detection signal input pin) T 100A 20 SHD2 High: 4.5V and above Low: 0.5V and below T: 15ns and above 20 150 Input pin of the sample / hold pulse (active at High) T 100A 21 SHD1 High: 4.5V and above Low: 0.5V and below T: 15ns and above 21 150 Input pin of the sample / hold pulse (active at High) [1] [2] 150A 22 22 DATA [1] MAX 800mV [2] MAX 800mV CCD signal input pin External applied voltage -5- CXA1310AQ No. Symbol I/O signal Equivalent circuit Description [1] [2] 150A 23 23 PG [1] MAX 800mV [2] MAX 800mV CCD single input pin T 100A 24 SHP 24 High: 4.5V and above Low: 0.5V and below T: 15ns 150 Input pin of the sample / hold pulse (active at High) T 50A 25 CLP2 High: 4.5V and above Low: 0.5V and below T: 2s 25 150 CLP2 pulse input pin (active at High) 26 GND3 GND Sample / hold GND 27 IRIS DC DC 1 3V 1.3V 320A 27 Output pin of the IRIS control signal 150 28 IRIS CLP 28 150 Capacitor connecting pin for IRIS output clamp External applied voltage -6- CXA1310AQ No. Symbol I/O signal T Equivalent circuit Description 40A 29 BLK High: 4.5V and above Low: 0.5V and below T: 11s 29 150 BLK pulse input pin (active at Low) T 50A 30 CLP1 High: 4.5V and above Low: 0.5V and below T: 2s 5V 30 150 CLP1 pulse input pin (active at High) 31 VCC2 Driver and IRIS power supply 32 VIDEO BLK level 1.5V 32 VIDEO signal output pin External applied voltage -7- CXA1310AQ Electrical Characteristics No. 1 Item Current consumption Min. value of AGC MAX Min. value of AGC CONT Max. value of AGC CONT AGC CONT 10dB AGC OUT DC 1 output level 2 output level LlNEAR AMP GAlN DET OUT DC IRlS AMP GAlN IRIS OUT DC DRlVER GAlN SYNC level SETUP 1 SETUP 2 Min. value of SET CONT Max. value of SET CONT W-CLIP level Min. value of WC CONT Max. value of WC CONT OP AMP output D range Low level OP AMP output D range High level Symbol lcc (Ta = 25C, VCC = 5V, See Electrical Characteristics Test Circuit) Conditions Current value of VCC1 and VCC2 AGC CONT = 1.5V GAIN between DATA input and AGC OUT DATA input = 100mV AGC MAX = 4V, AGC CONT = 1.5V GAIN between DATA input and AGC OUT DATA input = 500mV, AGC CONT = 5V GAIN between DATA input and AGC OUT DATA input = 30mV, AGC CONT = 1.5V GAIN between DATA input and AGC OUT DATA input = 320mV, AGC CONT = 3.55V DC output level of AGC OUT Test value of 1 output level IN input = 500mV Test value of 2 output level IN input = 500mV, S9 ON GAIN between IN input and LINEAR IN input = 500mV DC output level of DET OUT GAIN between DATA input and lRlS DATA input = 300mV DC output level of IRIS GAIN between DRlVER lN and VlDEO DRlVER IN = 700mV SYNC level/DG of VIDEO output SETUP level of preset mode 1 SETUP level/DG of VIDEO output SETUP level of preset mode 2 SETUP level/DG of VIDEO output SETUP level/DG of VIDEO output SET CONT = 2V SETUP level/DG of VIDEO output SET CONT = 3.3V W-CLlP level /DG of VlDEO output DRlVER IN = 1500mV, WC CONT = GND W-CLlP level /DG of VlDEO output DRlVER IN = 1500mV, WC CONT = 2.2V W-CLlP level /DG of VlDEO output DRlVER IN = 1500mV, WC CONT = 3.3V DC output level of OP OUT OP IN+ = 2.5V, OP lN- = 4V DC output level of OP OUT OP IN+ = 4V, OP lN- = 2.5V -8- Min. Typ. Max. Unit 30 45 60 mA 2 MAX -- 18 20 dB 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 AG1 AG2 AG3 ADC 1 2 LG DDC lG lDC DG SY SE1 SE2 SE3 SE4 WC1 WC2 WC3 OPL OPH -- 30 8 4 32 10 6 -- 12 dB dB dB V mV mV dB V dB V dB mV mV mV mV mV mV mV mV V V 2.25 2.55 2.85 530 580 1.6 1.8 8 1.1 5.7 270 -15 0 -- 80 780 -- 630 680 2.6 2.0 10 1.3 6.0 293 0 20 -3 130 820 300 730 780 3.6 2.2 12 1.5 6.3 316 15 40 15 -- 860 600 -- 1.2 -- 1000 1300 -- 4.5 0.8 4.8 Characteristics value at DRlVER GAlN item CXA1310AQ Electrical Characteristics Test Circuit 5V 0.1 24 23 22 0.1 21 5V 20 19 18 V 17 DATA OP IN- SHD1 SHP SHD2 25 CLP2 26 GND3 OP IN+ AGC CONT 16 5V VCC1 15 AGC MAX 14 DET OUT 13 AGC OUT 12 IN 11 CLP 10 0.01 OP OUT PG (5V) A (0V) V 0.01 27 IRIS 28 IRIS CLP 29 BLK 30 CLP1 V V 5V A V 31 VCC2 SET CONT 32 VIDEO WC CONT DRIVER IN LINEAR 9 V 5V S9 SYNC GND2 GND1 1 2 3 4 5 6 7 0.01 (0V) (0V) Notes) 1. F is the capacitance unit of the capacitor. 2. For Pins 5, 6, 14 and 16, apply voltage in brackets unless otherwise specified in the conditions column of the Electrical Characteristics. 3. V indicates a test pin. (Test AC, DC voltage) 4. For Pins 7, 11 and 22, the input signal level is at 0mV, unless otherwise specified in the conditions column of the Electrical Characteristics. -9- OUT 8 SAG V CXA1310AQ Test Circuit I/O Waveform Diagram Input pin 2.4V 22. DATA Input waveform Input level 11. IN 2.5V Input level 7. DRIVER IN 2.7V 5V 4. SYNC 0V 5V 29. BLK 0V 5V 30. CLP1 0V 5V 25. CLP2 0V 2s 2s 15s Input level 5s 50s Output pin Output waveform 12. AGC OUT Test 8. 1, 2 OUT Test 9. LINEAR Test 13. DET OUT Test 27. IRIS Test 32. VIDEO Test SYNC level - 10 - CXA1310AQ Application Circuit 100 2 CCD 1 10k 1k 100k TG 2.2F 2.2F 1M 20 19 18 17 1 10k 22F 2700 1k 0.01 2k 5V OP IN+ DATA 2200 2200 24 23 22 21 OP IN- SHD1 SHP SHD2 PG 47p 47p 25 CLP2 26 GND3 AGC CONT 16 VCC1 15 10F AGC MAX 14 OP OUT 0.01 5V 5V 36k 14k IRIS CONT IRIS DET 27 IRIS 28 IRIS CLP 0.01 DET OUT 13 AGC OUT 12 LPF 0.01 5V 10F 100F 75 10F 5V 75 OUT 2200 2200 47p SG 47P 30 CLP1 31 VCC2 IN 11 1F CLP 10 0.01 29 BLK SET CONT 32 VIDEO WC CONT DRIVER IN LINEAR 9 GND1 SYNC GND2 1 2 3 4 5 6 7 0.1 1 Use a high FT transistor. (2SC3355) 2 Use a FET similar to 2SK152 or 2SK300. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. - 11 - OUT 8 SAG CXA1310AQ Example of Representative Characteristics (Vcc = 5V, Ta = 25C) AGC control characteristics AGC MAX control characteristics 40 40 GAIN [dB] 20 GAIN [dB] 0 1 2 3 AGC CONT [V] 4 5 30 30 20 10 10 0 0 0 1 2 3 AGC MAX [V] 4 5 White clip control characteristics 100 Setup control characteristics 1000 White clip level [mV] 800 Setup level [mV] Preset 50 600 400 Preset 0 0 1 2 3 WC CONT [V] 4 5 0 1 2 3 SET CONT [V] Preset 4 5 1 I/O characteristics 2 I/O characteristics 1000 1000 1 output level [mV] 2 output level [mV] 500 500 0 500 IN input level [mV] 1000 0 500 IN input level [mV] 1000 - 12 - CXA1310AQ Package Outline Unit: mm 32PIN QFP (PLASTIC) 9.0 0.2 + 0.3 7.0 - 0.1 24 17 + 0.35 1.5 - 0.15 0.1 25 16 32 9 + 0.2 0.1 - 0.1 1 0.8 + 0.15 0.3 - 0.1 8 + 0.1 0.127 - 0.05 0 to 10 0.24 M PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-32P-L01 QFP032-P-0707 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING 42 ALLOY 0.2g - 13 - 0.50 (8.0) |
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