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MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR DESCRIPTION
The M52347 automatically selects three types of synchronous signals containing separate sync (positive and negative polarities of 0.5 to 2.5 VP-P), composite sync (positive and negative polarities of 0.5 to 2.5 VP-P) and sync-on-video (sync negative polarity), and performs waveform shaping. The IC is optimum to synchronous signal processing for multi-scan type display monitor.
H. STATE 1 V. STATE 2 CLAMP SW 3 20 CLAMP TIMING 19 Y. POL. 18 H. POL.
PIN CONFIGURATION (TOP VIEW)
M52347SP/FP
FEATURES
GREEN IN 4 GND 5 COMP/H IN 6 COMP/H DET 7 V IN 8 V DET 9 V TIME GATE SW 10
17 CLAMP+ OUT 16 VCC 15 HD- OUT 14 HD+ OUT 13 VD+ OUT 12 V S/S OUT 11 V S/S IN
* * * * *
Low power consumption with supply voltage of 5V Capable of obtaining output information on whether to input synchronous signal, and on polarity Output of clamp pulse Equipped with V TIME GATE SW that enables selecting whether or not VD portion pulse is output from pin 14 / 15 . Equipped with CLAMP SW that enables switching the clamp pulse output position.
APPLICATION
Display monitor
Outline 20P4B(SP) 20P2N-A(FP)
RECOMMENDED OPERATING CONDITION
Supply voltage range..............................................Vcc=4.5 to 5.5V Rated Supply voltage............................................................Vcc=5V
BLOCK DIAGRAM
CLAMP TIMING 20
Y. POL. 19
H. POL. 18
CLAMP+ OUT 17
VCC 16
HDOUT 15
HD+ OUT 14
VD+ OUT 13
V S/S OUT 12
V S/S IN 11
CLAMP GET
EDGE SW
V. TIME GATE
V. SYNC SEP
LOGIC LOGIC SYNC SEP H SHAPE H DET V SHAPE V DET
1 H. STATE
2 V. STATE
3 CLAMP SW
4 GREEN IN
5 GND
6 COMP/H IN
7 COMP/H DET
8 V IN
9 V DET
10 V TIME GATA SW
1
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR ABSOLUTE MAXIMUM RATINGS (Ta=25C, unless otherwise noted)
Symbol VCC Pd Surge Topr Tstg Parameter Supply voltage Power dissipation Electrostatic discharge Operating temperature Storage temperature Ratings 6.0 1237.6(SP),827.8(FP) 200 -20 to +85 -40 to +150 Unit V mW V C C
ELECTRICAL CHARACTERISTICS
Symbol
Circuit current
(Ta=25C, Vcc=12V, unless otherwise noted)
In put pin
16
Parameter ICC Pin 1 output Hi level
Relay condition 4 2 6 2
TP condition
Input condition
8 16 3 10 2 2 5V 5V
0V 2.5V 5V
Out put pin
Output waveform
Note 40
Limits Min. Typ. Max. 53 66
Unit mA
A
1S 1S
6
1 OH
2
1
1
1
5V
8
1 OL
Pin 1 output Low level
2
1
1
1
0V 2.5V 5V
6
5V
8
1S 1S 1S 1S
50kHz 1VP-P 50kHz 1VP-P 50kHz 0.2VP-P 50kHz 1.0VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 1.0VP-P 50kHz 0.2VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 1VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P
1
DC
4.0
5.0
5.0
V
1
DC
0.2 VP-P of input signal is equivalent to NON SYNC.
0
0.04 0.5
V
The true value table depends on Table 1.
2 OH
Pin 2 output Hi level
2
1
1
1
0V 2.5V 5V
6
5V
8
2
DC
4.0
5.0
5.0
V
2 OL
Pin 2 output Low level
2
1
1
1
0V 2.5V 5V
6
5V
8
1S 1S
2
DC
0.2 VP-P of input signal is equivalent to NON SYNC.
0
0.04 0.5
V
18 OH
Pin 18 output Hi level
2
1
1
1
0V 2.5V 5V
6
5V
8
1S 1S 1S 1S
18
DC
4.0
5.0
5.0
V
18 OL
Pin 18 output Low level
2
1
1
1
0V 2.5V 5V
6
5V
8
18
DC
0
0.04 0.5
V
19 OH
Pin 19 output Hi level
2
1
1
1
0V 2.5V 5V
6
5V
8
1S 1S 1S 1S 1S 1S
19
DC
4.0
5.0
5.0
V
19 OL
Pin 19 output Low level
2
1
1
1
0V 2.5V 5V
6
5V
8
19
DC
0
0.04 0.5
V
14 OH
Pin 14 output Hi level
1
1
2
1
0V 2.5V 5V
4
5V
6
14
V Meas
4.0
5.0
5.0
V
14 OL
Pin 14 output Low level
1
1
2
1
0V 2.5V 5V
4
1 S 1S
5V
6
14
0
V Meas
0.25 0.5
V
2
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR ELECTRICAL CHARACTERISTICS
Symbol
(cont.)
In put pin
4
Parameter
Relay condition 4 6 1
TP condition
Input condition
1S 1S
8 16 3 10 2 1
0V 2.5V 5V
Out put pin
Output waveform
Note
Limits Min. Typ. Max.
Unit
15 OH
Pin 15 output Hi level
1
5V
6
15 OL
Pin 15 output Low level
1
1
2
1
0V 2.5V 5V
4
1S 1S 1S 1S
5V
6
17 OH
Pin 17 output Hi level
1
1
2
1
0V 2.5V 5V
4
5V
6
50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 2VP-P
V Meas
15
4.0
5.0
5.0
V
15
0
V Meas
0.25 0.5
V
V Meas
17
4.0
5.0
5.0
V
17 OL
Pin 17 output Hi level
1
1
2
1
0V 2.5V 5V
4
1S 1S
5V
6
17
0
V Meas
0.25 0.5
V
13 OH
Pin 13 output Hi level
2
2
1
1
0V 2.5V 5V
5V
8
1S
13
V Meas
4.0
5.0
5.0
V
13 OL
Pin 13 output Low level
2
2
1
1
0V 2.5V 5V
5V
8
1S
50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.05VP-P
13
0
V Meas
0.25 0.5
V
12 OH
Pin 12 output Hi level
1
1
2
1
0V 2.5V 5V
4
1S 1S
5V
6
V Meas
12
4.0
5.0
5.0
V
12 OL
Pin 12 output Low level Sync-Sep Sync input signa Max. noise amplitude voltage Sync-Sep Sync input signal Min. amplitude voltage
1
1
2
1
0V 2.5V 5V
4
1S 1S
5V
6
12
0
V Meas
0.25 0.5
V
SS-NV
1
2
2
1
0V 2.5V 5V
14 15 17
5V
4
1S
No pulse must be output.
Must not operate when input amplitude is 0.05 VP-P or less. (Pseudo noise signal) Must operate when the input amplitude is 0.2 VP-P or more.
Checking output pulse for output with a voltage of 5 VDC applied, decrease the DC voltage and then measure the voltage when the output pulse is not output. Checking output pulse for output with a voltage of 0 VDC applied, increase the DC voltage and then measure the voltage when the output pulse is not output. Checking output pulse for output with a voltage of 5 VDC applied, decrease the DC voltage and then measure the voltage when the output pulse becomes narrow.
-
-
0.05 VP-P
50kHz
SS-LV
1
2
2
1
0V 2.5V 5V
5V
4
1S
50kHz 0.2VP-P
14
17
No pulse must be output in this portion.
0.2
-
-
VP-P
V3H
CLAMP SW Threshold voltage H
Variable
DC voltage must be applied.
3
14
17
2
1
2
1
5V
6
2.8
3.1
3.4
V
1S
50kHz 2VP-P
15
V3L
CLAMP SW Threshold voltage H Variable
Variable
DC voltage must be applied.
3
14
17
2
1
2
1
5V
6
1.0
1.3
1.6
V
1S
50kHz 2VP-P 50kHz 2VP-P 50kHz 2VP-P
15
V10
V TIME GATE SW Threshold voltageVariable
6
1S 1S
2
1
1
1
0V 5V
Variable
14
8
2.0
2.5
3.0
V
10
DC voltage must be applied.
15
3
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR
ELECTRICAL CHARACTERISTICS
Symbol
(cont.)
In put pin
4
Parameter
Relay condition 4 6 1
TP condition
Input condition
1S 1S
8 16 3 10
0V
Out put pin
Output waveform
Input 6 (50%)
Note
Limits Min. Typ. Max.
Unit
HD
+-DA
HD+-delay time (A)
1
2
1
5V
5V
6
50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P 50kHz 0.6VP-P 50kHz 2VP-P
14
Time Meas Output 14 (50%) Input 6 (50%) Time Meas Output 14 (50%) Input 4 (50%)
-
120 350 nsec
HD+-DB
HD+-delay time (B)
0V
4
1S 1S
1
1
2
1
5V
5V
6
14
-
80
350 nsec
HD+-DC
HD+-delay time (C)
4
1S 1S
1
1
2
1
2.5V
5V
6
14
Time Meas Output 14 (50%) nput 4 (50%) Time Meas Output 14 (50%) nput 6 (50%)
-
140 350 nsec
HD+-DD
HD+-delay time (D)
4
1S 1S
1
1
2
1
2.5V
5V
6
14
-
120 350 nsec
HD--DA
HD--delay time (A)
0V
4
1S 1S
1
1
2
1
5V
5V
6
15
Time Meas Output 15 (50%) nput 6 (50%) Time Meas
-
70
350 nsec
HD--DB
HD--delay time (B)
0V
4
1S 1S 1S 1S
1
1
2
1
5V
5V
6
15
Output 15 (50%) Input 4 (50%)
120 350 nsec
HD--DC
HD--delay time (C)
4
1
1
2
1
2.5V
5V
6
15
Time Meas Output 15 (50%) Input 4 (50%)
-
100 350 nsec
HD--DD
HD--delay time (D)
4
1S 1S
1
1
2
1
2.5V
5V
6
15
Output 15
Time Meas (50%) Time Meas
-
150 350 nsec
CP+-DA
CP+-delay time (A)
4
1
1
2
1
0V
5V
6
1S 1S
nput 6 (50%)
17
-
90
350 nsec
Output 17 (50%) nput 4 (50%)
17
CP+-DB
CP+-delay time (B)
4
1S 1S
1
1
2
1
2.5V
5V
6
Time Meas
-
130 350 nsec
Output 17 (50%) nput 6 (50%)
17
CP+-DC
CP+-delay time (C)
4
1S 1S
1
1
2
1
5V
5V
6
Time Meas Output 17 (50%) Time Meas
-
90
350 nsec
CP+-PW
CP+-PULSE -WIDTH
1
1
2
1
0V 2.5V 5V
4
1S 1S
5V
6
17
250 400 550 nsec
Output 17 (50%)
4
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR
ELECTRICAL CHARACTERISTICS
Symbol
(cont.)
In put pin
Parameter
Relay condition 4 6 2
TP condition
Input condition
8 16 3 10 1 1
0V 2.5V 5V
Out put pin
Output waveform
Input 8 (50%)
Note
Limits Min. Typ. Max.
Unit
VD+-DA
VD+ -delay time (A)
2
5V
8
1S
50kHz 2VP-P
13
Time Meas Output 13 (50%) Input 8 (50%) Time Meas Output 13 (50%)
-
100 350 nsec
VD+-DB
VD+ -delay time (B)
2
2
1
1
0V 2.5V 5V
5V
8
1S
50kHz 2VP-P 50kHz 2VP-P
13
Checking output pulse for output with a voltage of 0 VDC applied, increase the DC voltage and then measure the voltage when the output pulse is not output. Checking output pulse for output with a voltage of 5 VDC applied, decrease the DC voltage and then measure the voltage when the output pulse is output.
70
350 nsec
1S
14
V11H
V Sync-Sep Threshold voltage H
0V
6
2
1
2
1
5V
0V
11
3.0
3.5
4.0
V
DC voltage must be applied.
1S
15
50kHz 2VP-P
14
V11L
V Sync-Sep Threshold voltage L
0V
6
2
1
2
1
5V
0V
11
1.3
1.8
2.3
V
DC voltage must be applied.
15
5
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR TEST CIRCUIT
V11 100p V10 111 V S/S IN V TIME 10 GATA SW 10 12 V S/S OUT V DET 9
43k
4.7 TP13 13 VD+ ONT V IN 8
R8
2 1
0.0068 TP14 14 HD+ OUT COMP/H DET 7
4.7 TP15 15 HD- OUT COMP/H IN 6
R6
2 1
A
2 16 1 R16 75k 17 CLAMP+ OUT GREEN IN 4 3.3 1 R4 2 VCC GND 5
5V 0.01 47 TP17
TP18
18
H. POL.
CLAMP SW
3 V3
TP19 4.3k
19 V. POL.
V. STATE
2
TP2 TP2
20 220p
CLAMP TIMING
H. STATE
1
TP1
: 5V Units Resistance : Capacitance : F
6
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR DESCRIPTION OF PIN
Pin No.
Name
Pin voltage
Peripheral circuit of pins
Description of function Logic output pin for horizontal synchronous signal When pin 6 input signal is POSI, outputs "H"; when NON, outputs "L"; and when NEG, outputs "H". Logic output pin for vertical synchronous signal When pin 8 input signal is POSI, outputs "H"; when NON, outputs "L"; and when NEG, outputs "H".
1
H.STATE
0 VDC or 5 VDC
20k
1
2
V.STATE
0 VDC or 5 VDC
Same as pin
1
0.1mA 3.1V 1.3V 20k 20k 22k 28k 3
3
CLAMP SW
2.2V when open
This SW is available to change the generating position of clamp pulse for input signal. (See Table 2.) VTH L =0 to1V VTH M =1.6 to 2.8V VTH H =3.4 to 5V
4
GREEN IN
2.8V when open
1k 3.5V
1k 4
GREEN (SYNC ON VIDEO) input pin Input with negative sync. Comparison of pin 4 input signal and reference voltage within the IC performs synchronous separation.
5
GND
1.5k 1.5k
Grounding
20k
6
COMP/H IN
2.5V when open
6 10k 2.8V 10k 2.5V 0.3mA 0.3mA
20k 10k 2.2V
Composite sync/H sync input pin. Bias is approx. 2.5V and impedance is 10k. The internal double threshold comparator is used for shaping waveform and detecting polarity. Optimum input amplitude is 0.6 Vp-p at pin 6 . Up to approx. 50% of duty, waveform shaping and polarity detection can be done.
12k
12k 75k
7
COMP/H DET
2.5V when open (no signal)
7
External capacitance is required as a filter pin for detecting polarity and detecting non-input. As the value is larger, the ripple is smaller and less malfunction 2.5V occurs. However, this lowers the response speed of detection.
2.2V
2.8V
20k
20k
8
V IN V DET
2.5V when open 2.5V when open (no signal)
Same as pin Same as pin
6
V sync input pin Same as pin 6 Same as pin
7
9
7
7
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR DESCRIPTION OF PIN (cont.)
Pin No.
Name
Pin voltage
Peripheral circuit of pins
0.1mA
10
V.TEME GATE SW
3.2V when open
Description of function V TIME GATE SW pin Can select whether to output the pulse of VD portion from pin 14 , 15 output pluse. The threshold voltage is approx. 2.5V. VTH L=0 to 2V VTH H=3 to 5V
10
2.5V 20k
30k
0.1mA 11
7.5k
4k
V S/S IN pin Inputs a signal of having externally integrated composite sync for V sync separation.
11
V S/S IN
1k
5.5k
1k 1.75k
20k 0.2mA 0.2mA
12
V S/S OUT
1k 12
V S/S pulse output pin No problem occurs when current of approx. 6 mA flows to internal part of the IC. To improve the rising speed, connect a resistance between power supplies. VD+ pulse output pin Same as pin 12 HD+ pulse output pin Same as pin 12 HD- pulse output pin Same as pin 12 Power supply CLAMP+ pulse output pin Same as pin 12 Logic output pin for horizontal synchronous signal When pin 6 input signal is POSI, outputs "L"; when NON, outputs "L"; and when NEG, outputs "H". Logic output pin for vertical synchronous signal When pin 8 input signal is POSI, outputs "L"; when NON, outputs "L"; and when NEG, outputs "H". CLAMP TIMING pin The clamp pulse width is determined depending on the external resistance and capacitance. As the resistance value and capacitance value are larger, the clamp pulse width is wider.
13
VD+OUT HD+OUT HD-OUT VCC CLAMP OUT
+
Same as pin 12 Same as pin 12 Same as pin 12 5V Same as pin 12
14
15
16
17
18
H.POL.
0 VDC or 5 VDC
Same as pin
1
19
V.POL.
0 VDC or 5 VDC
Same as pin
1
3.0V
4k
4k
20
CLAMP TIMING
1.9V 20
3V
1.9V
0.4mA
0.2mA
8
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR Table 1 DECODER Logic Output
Pin 6 input COMP/H POSI. Pin
8
Table 2 Clamp Pulse Position
Output pin
1 2 18 19
Input V
Input signal Pin
4
Pin 17 output signal
6
Pin
NEG.
NON.
NON POSI. NEG. NON POSI. NEG. NON POSI. NEG.
H H H H H H L L L
L H H L H H L H H
L L L H H H L L L
L L H L L H L L H
Pin 3 "H" 4 trailing edge 6 leading edge 6 leading edge
Pin 3 "M" 4 trailing edge 4 trailing edge
Pin 3 "L" 4 trailing edge 6 trailing edge 6 trailing edge
Table 3 Output Priority Order
Input signal Pin
4
Output signal Pin Pin
8 3 15
"H" "L" ,
17
Pin
13
3 15
"M" , 17 Pin
13
Pin
6
Pins
12
,, 4 6 4 6
14
Pin 11 11 8 8 11 8 8
Pins
12
,, 4 4 4 4
14
11 11 8 8
6 6
8 8
Table 4 Allowable Input Amplitude Voltage
Pin 4 input amplitude
VV 0 to 2.1(VP-P) fH=10Hz to 200kHz VS 0.2 to 0.6(VP-P) fV=10Hz to 200Hz
Pin 6 input amplitude
VS 0.5 to 2.5(VP-P) fH=10Hz to 200kHz
Pin 8 input amplitude
VS 0.5 to 2.5(VP-P) fV=10Hz to 200Hz
9
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR APPLICATION METHOD
1. Input block 1) GREEN (SYNC ON VIDEO) IN (Pin Input with sync negative polarity. Comparison of pin the input at pin
4 3
18k
)
Input signal 100 3k
pin 6 or pin 8
input signal and the reference voltage of
the inside of the IC performs the synchronous separation. When
4
is less than or equal to the reference voltage
(2.8V) and the flowing current is more than or equal to the input sensitivity current (200 A or more), the signal is separated. When only a synchronous signal is input into pin
4
This additional circuit (limiter) limits the amplitude to 0.6 VP-P.
: 5V
Fig. 4
30
, the
operatable amplitude and the duty are as shown in Figure 1. Operatable Maximum Duty (%) If the IC does not operate normally with the video signal input, change the value of external resistance R to make the current optimum. But, when capacity value and is )
6
25 20 15 10 5 0 0 0.2 0.4 0.6 3.3
R=56k
too
big, output
response
becomes bad. 2) COMP/H IN, VIN (pins
6 8
R=75k
The composite sync input is connected to pin
. H and V of the
6
4 f=100kHz R
separate sync input are connected to pins respectively. For each of pins
6
and
8
,
and
8
, the bias is 2.5V and the
impedance is 10 k. The internal double threshold converter is used for shaping waveform and for detecting polarity. Average DC voltage of input signal is 2.5V. If the duty ratio at pin Each threshold voltage is set at a voltage 0.3V away from this voltage.
6
0.8
1.0
Input Amplitude (VP-P) Fig. 1
50
is small as shown in Figure 2, the
optimum value is approx. 0.3 VP-P. If the duty ratio is large, the optimum value is approx. 0.6 VP-P. Figure 3 shows the allowable input amplitude and the reference value of duty test. Only 5V TTL input, decrease the amplitude by resistor splitting. In addition, Figure 4 shows an example for improving the capability of the allowable duty when the input amplitude is 0.7 VP-P or more. To use the IC out of the standard value, remove the filter from pins
7
Operatable Maximum Duty (%)
40
30
20
and
9
, observe the waveform and check for a match
10
with the waveform shown in Figure 5.
0 0 0.5 1 1.5 2 2.5
Input Amplitude (VP-P)
2.8V
Fig. 3
2.5V 4.5V 2.2V Small POSI Duty Lsrge NEG Duty NEG input 2.5V 2.5V POSI input 0.5V
Fig. 2
Fig. 5
10
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR
when COMP/H only is input or when both COMP/H and GREEN are input.
3) Polarity detection and non-input detection (pins
7
and
8
)
External capacitance is required as a filter pin to detect polarity and non-input. As the value is larger, the ripple is smaller and less malfunction occurs. However, the response speed for detection is lower. A sufficient external capacitance is 0.05 F with input of 15 kHz and 10 uF with input of 60 kHz. However, waveform with the duty ratio conditions, and then check that the value is 3.1V or more (2.8V in capability) with positive polarity input and 1.9V or less (2.2V in capability) with negative polarity input. 4) V S/S IN (pin ) check the frequency of the input signal in use and the filter pin
8
Clamp Pulse Width (usec)
6
4 R=10k 2 R=4.3k 0
11
Input a signal of having externally integrated composite sync for V sync separation. Composite sync input into pin
6
is output to pin
12
. Output at
12
10
100
1000
is externally integrated and is input into pin separation. With the waveform at pin
11
11
for V sync
Clamp Timing Capacitance at Pin 20 (pF)
, check that the H 3. Sampling Pulse from VD Portion V TIME GATE SW (Pin
10
element has been fully dropped. The threshold levels of sync separation, given hysteresis, are 3.5V and 1.8V. )
14
Whether to output the pulse of VD portion from pins can be selected. When pin
Input waveform at pin 6
10 10
and
15
is "H" or OPEN, pulse of the VD is "L", the pulse of the VD portion
portion is output. When pin is not output.
Waveform at pin 11
VTH=3.5V VTH=1.8V
Output at pin 14 when the pin 10 is "H" or OPEN
Output waveform at pin 13
2. Clamp Pulse 1) Clamp pulse width CLAMP TIMING (Pin
20
VD portion ) Output at pin 14 when pin 10 is "L" Output at pin 15 when pin 10 is "H" or OPEN
The clamp pulse width is determined by the external resistance and the capacitance. As the resistance value and capacitance value are larger, the clamp pulse width is wider. The time constant is determined by the current flowing out of pin
20
and the capacitance value of the timing pin. The flow current
20
at pin
is determined by the pin voltage and external resistance VD portion
value. When the external resistance is 4.3 (that is 700 uA) and the external capacitance is 220 pF, the pulse width is 0.4 usec. 2) Clamp pulse position CLAMP SW (pin When pin
3 3
)
Output at pin 15 when pin 10 is "L"
is "M" or "L", fixing a higher-priority signal to the
trailing edge results in occurrence of a clamp pulse. When pin 3 is 'H", and only GREEN is input, clamp pulse occurs at the trailing edge. A clamp pulse also occurs at the leading edge
11
MITSUBISHI ICs (Monitor)
M52347SP/FP
SYNC SIGNAL PROCESSOR
4. Output Stage 1) Logic output (pins
1
,
2
,
18
and
19
)
The output format is as shown in the diagram below. When the internal load resistance of the IC is 20 k, a current of approx. 3 mA flows to the inside of the IC, no problem will occur.
0.8
20k
0.6
Output Low Level (V)
0.4
2) Pulse output (pins
12
,
13
,
14
,
15
,and
17
)
The output format is as shown in the diagram below. When the internal load resistance of the IC is 1 k, a current of approx. 6 mA flows to the inside of the IC, no problem will occur. To improve the rising speed, connect a resistance between power supplies. Note that the low level of the output pulse goes up.
0.2
0 0 2 4 6 6 10
External Resistance (k)
1k
TYPICAL CHARACTERISTICS
THERMAL DERATING (MAXIMUM RATING)
1400 1237.6 1200 1000 SP 827.8 800 FP 600 400 200 0 -20 430.5 643.6
POWER DISSIPATION Pd (mW)
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE Ta (C)
12
13
VCC5V 0.01 43k
HD+ 47 HD OUT OUT
(POSI NON NEG) 100p
(POSI NON NEG)
220p 4.3k V. POL. H. POL. 18 13 12 11 16 15 14 19 V S/S OUT V S/S IN CLAMP+ OUT 17 VD+ OUT
CLAMP TIMING
20
CLAMP GEN EDGE SW V TIME GATE V. SYNC SEP.
LOGIC
APPLICATION EXAMPLE (fH=50kHz, fV=80 Hz)
LOGIC SYNC SW H SHAPE H DET V SHAPE V DET
1 2 4 8 4.7 0.068 4.7 1.0 18k 100 3k COMP/H IN
0.01
3 5 COMP/H DET
6 7
9 V DET 10 4.7
10 V TIME GATE SW H L
H. STATE GND 4.7 18k
V. STATE
(POSI NON NEG)
(POSI NON NEG)
CLAMP SW 56k H M L
: 5V 3k GREEN IN
0.01
100
Units Resistance : Capacitance : F
V IN
M52347SP/FP
SYNC SIGNAL PROCESSOR
MITSUBISHI ICs (Monitor)
* External circuit for input of pins 6 and 8 When amplitude of up to 5 VP-P is entered into this circuit, can be kept constant at approx. 0.6 VP-P. When the duty of input signal at pins 6 and 8 changes, the most broad support range is obtained with ampl itude of 0.6 VP-P.

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