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Final Electrical Specifications
LT6553 650MHz Gain of 2 Triple Video Amplifier
December 2003
FEATURES
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DESCRIPTIO
650MHz -3dB Small Signal Bandwidth 400MHz -3dB 2VP-P Large Signal Bandwidth 150MHz 0.1dB Bandwidth High Slew Rate: 2500V/s Fixed Gain of 2 Requires No External Resistors -75dB Channel Separation at 10MHz -50dB Channel Separation at 100MHz -77dB 2nd Harmonic Distortion at 10MHz, 2VP-P -73dB 3rd Harmonic Distortion at 10MHz, 2VP-P Low Supply Current: 8mA per Amplifier 6ns 0.1% Settling Time for 2V Step TTL Compatible Enable ISS 100A when Disabled Differential Gain of 0.01%, Differential Phase of 0.01 Wide Supply Range: 2.25V (4.5V) to 6V (12V) Available in 16-Lead SSOP Package
The LT(R)6553 is a high-speed triple video amplifier with an internally fixed gain of 2. The individual amplifiers are optimized for performance with a double terminated 75 video load and feature a 2VP-P full signal bandwidth of 400MHz, making them ideal for driving very high-resolution video signals. Separate power supply pins for each amplifier boost channel separation to 75dB, allowing the LT6553 to excel in many high-speed applications. While the performance of the LT6553 is optimized for dual supply operation, it can also be used on a single supply as small as 4.5V. Using dual 5V supplies, each amplifier draws only 8mA. When disabled, the amplifiers draw less than 100A and the EN pin and output pins become high impedance. Furthermore, the amplifiers are capable of turning on in less than 50ns, making them ideal for spread spectrum and portable applications. The LT6553 is manufactured on Linear Technology's proprietary low voltage complementary bipolar process and is available in the 16-lead SSOP package that fits in the same PCB area as an SO-8 package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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RGB Amplifiers Coaxial Cable Drivers LCD Projectors
TYPICAL APPLICATIO
1 2 3 LT6553
Triple Video Line Driver
16 15
5V
Large Signal Transient Response
1.5
RIN 75
+ - 370 370
14
75 75 -5V 75 75 5V 75 75
OUTPUT (V)
VIN = 1VP-P VS = 5V 1.0 RL = 15O TA = 25C 0.5 0 -0.5
4 370 GIN 75 5 6 370 370 - + 370
13
12 11
-1.0 -1.5
- 7 BIN 75 -5V 8 +
10
0
2
9
-5V
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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4 6 8 10 12 14 16 18 20 TIME (ns)
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ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW EN DGND INR AGND ING AGND INB V- 1 2 3 4 5 6 7 8
G = +2 G = +2 G = +2
Total Supply Voltage (V+ to V-) ............................ 13.2V Input Current (Note 2) ........................................ 10mA Output Current (Continuous) ............................. 70mA Differential EN to DGND Voltage (Note 2) ............... 5.5V Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4) ... -40C to 85C Specified Temperature Range (Note 5) .... -40C to 85C Storage Temperature Range .................. -65C to 150C Junction Temperature ........................................... 150C Lead Temperature (Soldering, 10 sec).................. 300C
16 V + 15 V + 14 OUTR 13 V - 12 OUTG 11 V + 10 OUTB 9 V-
ORDER PART NUMBER LT6553CGN LT6553IGN GN PART MARKING 6553 6553I
GN PACKAGE 16-LEAD PLASTIC SSOP
TJMAX = 150C, JA = 135C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, RL = 150, CL = 1.5pF, VEN = 0.4V, VAGND, VDGND = 0V.
SYMBOL VOS IIN+ RIN+ CIN+ PSRR +IPSRR AV ERR AV MATCH VOUT IS PARAMETER Input Referred Offset Voltage Noninverting Input Current Noninverting Input Resistance Noninverting Input Capacitance Power Supply Rejection Ratio Input Current Power Supply Rejection Gain Error Gain Matching Maximum Output Voltage Swing
q
ELECTRICAL CHARACTERISTICS
CONDITIONS VIN = 0V, VOS = VOUT/2
q q
MIN
TYP 3 17
MAX 10 20 50
UNITS mV mV A k pF dB
VIN = 1.5V f = 100kHz VS (Total) = 4.5V to 12V (Note 6) VS (Total) = 4.5V to 12V (Note 6) VOUT = 2V Any One Channel to Another
q
150 56
400 2 62 1 -1.5 1 4 5
q q q
A/V % % V V
3.25 3.1
3.5 8 11 14 100 100 50
Supply Current, Per Amplifier Supply Current, Disabled, Total
RL = RL = VEN = 4V, RL = VEN = Open, RL = VEN = 0.4V VEN = V+ RL = 0, VIN = 1V 1V on 2V Output Step -3dB, VOUT = 200mVP-P 0.1dB, VOUT = 200mVP-P
q q q q q q
22 0.5 -200 50 1700 -95 0.5 105 2500 650 150
IEN ISC SR -3dB BW 0.1dB BW
Enable Pin Current Output Short-Circuit Current Slew Rate Small Signal -3dB Bandwidth Gain Flatness 0.1dB
2
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mA mA A A A A mA V/s MHz MHz
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The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, RL = 150, CL = 1.5pF, VEN = 0.4V, VAGND, VDGND = 0V.
SYMBOL FPBW FPBW PARAMETER Full Power Bandwidth 2V Full Power Bandwidth 4V All Hostile Crosstalk tS tF, tR dG dP HD2 HD3 Settling Time Small-Signal Rise and Fall Time Differential Gain Differential Phase 2nd Harmonic Distortion 3rd Harmonic Distortion CONDITIONS -3dB, VOUT = 2VP-P (Note 7) -3dB, VOUT = 4VP-P f = 10MHz, VOUT = 2VP-P f = 100MHz, VOUT = 2VP-P 0.1% of VFINAL, VSTEP = 2V 10% to 90%, VOUT = 200mVP-P (Note 8) (Note 8) f = 10MHz, VOUT = 2VP-P f = 10MHz, VOUT = 2VP-P MIN 270 TYP 400 200 -75 -50 6 550 0.01 0.01 -77 -73 MAX UNITS MHz MHz dB dB ns ps % Deg dB dB
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: This parameter is guaranteed to meet specified performance through design and characterization. It is not production tested. Note 3: As long as output current and junction temperature are kept below the Absolute Maximum Ratings, no damage to the part will occur. Depending on the supply voltage, a heat sink may be required. Note 4: The LT6553C is guaranteed functional over the operating temperature range of -40C to 85C. Note 5: The LT6553C is guaranteed to meet specified performance from 0C to 70C. The LT6553C is designed, characterized and expected to meet specified performance from -40C and 85C but is not tested or QA sampled at these temperatures. The LT6553I is guaranteed to meet specified performance from -40C to 85C.
Note 6: The two supply voltage settings for power supply rejection are shifted from the typical VS data points for ease of testing. The first measurement is taken at V+ = 3V, V- = -1.5V to provide the required 3V headroom for the enable circuitry to function with EN, DGND, AGND and all inputs connected to 0V. The second measurement is taken at V+ = 8V, V- = -4V. Note 7: Full power bandwidth is calculated from the slew rate: FPBW = SR/( * VP-P) Note 8: Differential gain and phase are measured using a Tektronix TSG120YC/NTSC signal generator and a Tektronix 1780R video measurement set. The resolution of this equipment is better than 0.1% and 0.1. Nine identical amplifier stages were cascaded giving an effective resolution of better than 0.011% and 0.011.
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current per Amplifier vs Temperature
12 10
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
VEN = 0V 8 6 4 2 0 -55 -35 -15 VEN = 0.4V
5 25 45 65 85 105 125 TEMPERATURE (C)
6553 G01
UW
VS = 5V RL = VIN = 0V
Supply Current per Amplifier vs Supply Voltage
12 V- = -V+ VEN, VDGND, VIN = 0V 10 TA = 25C 8 6 4 2 0 12 10 8 6 4 2 0
Supply Current per Amplifier vs EN Pin Voltage
TA = -55C TA = 25C TA = 125C VS = 5V VDGND = 0V VIN = 0V
0
1
2
3 4 5 6 7 8 9 10 11 12 TOTAL SUPPLY VOLTAGE (V)
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0
0.5
1.0
1.5 2.0 2.5 3.0 EN VOLTAGE (V)
3.5
4.0
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LT6553 TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias Current vs Input Voltage
20 VS = 5V 5
INPUT BIAS CURRENT (A)
OUTPUT VOLTAGE (V)
TA = 125C -20
3
TA = -55C TA = 25C
OUTPUT VOLTAGE (V)
0
TA = 25C TA = -55C
-40
-60 -2.5
-1.5
0.5 1.5 -0.5 INPUT VOLTAGE (V)
Output Voltage vs Input Voltage
5 VS = 5V 4 RL = 150 3 OUTPUT VOLTAGE (V) EN PIN CURRENT (A) 2 1 0 -1 -2 TA = -55C -3 -4 -5 -2.5 -1.5 0.5 1.5 -0.5 INPUT VOLTAGE (V) 2.5
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-60 -80
TA = 125C TA = -55C TA = 25C
OUTPUT (V)
Video Amplitude Transient Response
0.9 VO = 700mVP-P 0.8 VS = 5V RL = 150 0.7 T = 25C A 0.6 OUTPUT (V) 0.5 0.4 0.3 0.2 0.1 0 -0.1 0 2 4 6 8 10 12 14 16 18 20 TIME (ns)
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OUTPUT (V)
OUTPUT (V)
4
UW
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Output Voltage Swing vs ILOAD (Output High)
VS = 5V VIN = 2V 0
Output Voltage Swing vs ILOAD (Output Low)
VS = 5V VIN = -2V TA = 25C -2 TA = 125C -3 TA = -55C
4
-1
2 TA = 125C 1
-4
0 2.5 0 10 20 30 40 50 60 70 80 90 100 LOAD CURRENT (mA)
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-5
0
10 20 30 40 50 60 70 80 90 100 LOAD CURRENT (mA)
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EN Pin Current vs EN Pin Voltage
0 VS = 5V VDGND = 0V 0.15
Small Signal Transient Response
VIN = 100mVP-P VS = 5V 0.10 RL = 150 TA = 25C 0.05 0 -0.05 -0.10 -0.15
TA = 125C
-20 -40
TA = 25C
-100 -120 -140 0 1 3 2 EN PIN VOLTAGE (V) 4 5
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0
2
4
6
8 10 12 14 16 18 20 TIME (ns)
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Large Signal Transient Response
1.5 VIN = 1VP-P VS = 5V 1.0 RL = 150 TA = 25C 0.5 0 -0.5 -1.0 -1.5 4 3 2 1 0 -1 -2 -3 -4 0 2 4 6 8 10 12 14 16 18 20 TIME (ns)
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Large Signal Transient Response
VO = 5VP-P VS = 5V RL = 150 TA = 25C
0 2 4 6 8 10 12 14 16 18 20 22 24 26 TIME (ns)
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APPLICATIO S I FOR ATIO
Power Supplies The LT6553 is optimized for 5V supplies but can be operated on as little as 2.25V or a single 4.5V supply and as much as 6V or a single 12V supply. Internally, each supply is independent to improve channel isolation. Do not leave any supply pins disconnected or the part may not function correctly! Enable/Shutdown The LT6553 has a TTL compatible shutdown mode controlled by the EN pin and referenced to the DGND pin. If the amplifier will be enabled at all times, the EN pin can be connected directly to DGND. If the enable function is desired, either driving the pin above 2V or allowing the internal 46k pull-up resistor to pull the EN pin to the top rail will disable the amplifier. When disabled, the DC output impedance will rise to approximately 700 through the internal feedback and gain resistors. Supply current into the amplifier in the disabled state will be primarily through V+ and approximately equal to (V+ - EN)/46k. It is important that the two following constraints on the DGND pin and the EN pin are always followed: V+ - VDGND 3V VEN - VDGND 5.5V Split supplies of 3V to 5.5V will satisfy these requirements with DGND connected to 0V. In single supply applications above 5.5V, an additional resistor may be needed from the EN pin to DGND if the pin is ever allowed to float. For example, on a 12V single supply, a 33k resistor would protect the pin if it were allowed to float high while still allowing the internal pullup resistor to disable the part. On dual 2.25V supplies, connecting the EN and DGND pins to V- is the easiest way of ensuring that V+ - VDGND is more than 3V. The DGND pin should not be pulled above the EN pin since doing so will turn on an ESD protection diode. If the EN pin voltage is forced a diode drop below the DGND pin, current should be limited to 10mA or less. The enable/disable times of the LT6553 are fast when driven with a logic input. Turn on (from 50% EN input to 50% output) typically occurs in less than 50ns. Turn off is slower, but is nonetheless below 300ns.
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Input Considerations The LT6553 input voltage range is from V- + 1V to V+ - 1V. Therefore, on split supplies the LT6553 input range is always larger than the output swing. On a single positive supply, however, the input range limits the output low swing to 2V (1V multiplied by the internal gain of 2). The inputs can be driven beyond the point at which the output clips so long as input currents are limited to below 10mA. Continuing to drive the input beyond the output limit can result in increased current drive and slightly increased swing, but will also increase supply current and may result in delays in transient response at larger levels of overdrive. Layout and Grounding It is imperative that care is taken in PCB layout in order to utilize the very high speed and very low crosstalk of the LT6553. Separate power and ground planes are highly recommended and trace lengths should be kept as short as possible. If input or output traces must be run over a distance of several centimeters, they should use a controlled impedance with matching series and shunt resistances (nominally 75) to maintain signal fidelity. Low ESL/ESR bypass capacitors should be placed as close to the positive and negative supply pins as possible. One 0.01F ceramic capacitor is recommended for both V+ and V-. Additional 470pF ceramic capacitors with minimal trace length on each supply pin will further improve AC and transient response as well as channel isolation. For high current drive and large-signal transient applications, additional 1F to 10F tantalums should be added. The smallest capacitors should be placed closest to the package. To maintain the LT6553's channel isolation, it is beneficial to shield parallel input and output traces using a ground plane or power supply traces. Vias between topside and backside metal may be required to maintain a low inductance ground near the part where numerous traces converge. ESD Protection The LT6553 has reverse-biased ESD protection diodes on all relevant pins. If any pins are forced a diode drop above the positive supply or a diode drop below the negative supply, large currents may flow through these diodes. If the current is kept below 10mA, no damage to the devices will occur.
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TYPICAL APPLICATIO
RGB Buffer Demo Board
The DC714 Demo Board illustrates optimal routing, bypassing and termination using the LT6553 as an RGB video buffer. The schematic is shown in Figure 1. All inputs and outputs are routed to have a characteristic impedance of 75 and 75 shunt and series terminations are connected as close to the part as possible. For ideal operation, a 75 shunt termination should be connected at the output. The LT6553's gain of 2 will compensate for the resulting divider between the series and shunt termination resistors. A fourth signal trace is provided at the bottom of the board with dimensions identical to the combined input and output of the other channels. This trace can be used for calibrating out the effects of electrical delay and
E1 EN J1 50 BNC 1 EN
5432 JP2 DGND 12 3 AGND FLOAT 5 4 3 2 5 4 3 2 5 4 3 2 BNC x 3 1 J5 1 J6 1 J7 E3 AGND SINGLE 1 DUAL 23 Z = 75 Z = 75
12 ENABLE
E2 DGND
INR
ING
Z = 75 R4 75 R5 75 R6 75
INB
AGND J3 BANANA JACK CAL 5 4 3 2 1 J8 BNC
JP3 SUPPLY
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impedance mismatching and is not necessary in an enduser application. Several jumpers and additional connectors are also included to allow for testing of the enable feature and single supply operation. RGB Video Selector/Cable Driver A video multiplexer can be implemented using the EN pins of parallel LT6553s as shown in Figure 2. In this application, all outputs are connected together and one LT6553 is switched on while the other is switched off. A fast inverter is used to ensure that only one set of R, G and B channels is buffered at any time. As shown, the outputs are connected before the 75 series termination resistors in order to reduce any DC attenuation that may result from the non-infinite output impedance of the disabled LT6553.
JP1 CONTROL 3 EXT C1 4700pF 1 2 3 4 5 6 7 8 V+ V
+
V+ V+ C4 J2 10F, 16V BANANA JACK 1210 NOTE 5 BNC x3 1 J9 Z = 75 1 J10 1 J11 V- V- J4 BANANA JACK
C2 470pF
C3 4700pF
EN DGND INR AGND ING AGND INB V- U1 LT6553CGN
16 15 14 13 12 11 10 9 R1 75 R2 75 R3 75 5 4 3 2 5 4 3 2 5 4 3 2
OUTR V- OUTG V+ OUTB V-
Z = 75
OUTR
OUTG
Z = 75
OUTB
C5 470pF
C6 1000pF
C7 470pF
C8 4700pF
C9 10F, 16V 1210
Z = 75
1 J12 BNC
5 4 3 2
CAL
Figure 1. DC714 Demo Board Schematic
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PACKAGE DESCRIPTIO
.254 MIN
.0165 .0015
RECOMMENDED SOLDER PAD LAYOUT 1 .015 .004 x 45 (0.38 0.10) .007 - .0098 (0.178 - 0.249) .016 - .050 (0.406 - 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0 - 8 TYP .053 - .068 (1.351 - 1.727) 23 4 56 7 8 .004 - .0098 (0.102 - 0.249)
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GN Package 16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.045 .005 .189 - .196* (4.801 - 4.978) 16 15 14 13 12 11 10 9 .009 (0.229) REF .150 - .165 .229 - .244 (5.817 - 6.198) .150 - .157** (3.810 - 3.988) .0250 TYP .008 - .012 (0.203 - 0.305) .0250 (0.635) BSC
GN16 (SSOP) 0502
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TYPICAL APPLICATIO
NC7SZ14
R1
G1
B1 75 75 75
SEL
R0
G0
B0 75 75 75
RELATED PARTS
PART NUMBER LT1259/LT1260 LT1395/LT1396/LT1397 LT1398/LT1399 LT1675/LT1675-1 LT1809/LT1810 LT6550/LT6551 DESCRIPTION Dual/Triple 130MHz Current Feedback Amplifiers Single/Dual/Quad 400MHz Current Feedback Amplifiers Dual/Triple 300MHz Current Feedback Amplifiers 250MHz, Triple and Single RGB Multiplexer with Current Feedback Amplifiers Single/Dual, 180MHz, Rail-to-Rail Input and Output Amplifiers 3.3V Triple and Quad Video Buffers COMMENTS Shutdown, Operates to 15V 800V/s Slew Rate 0.1dB Gain Flatness to 150MHz, Shutdown 100MHz Pixel Switching, -3dB Bandwidth: 250MHz, 1100V/s Slew Rate 350V/s Slew Rate, Shutdown, Low Distortion -90dBc at 5MHz 110MHz Gain of 2 Buffers in MS Package
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
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3.3V 1 2 3 4 5 6 7 8 LT6553 16 15 14 13 12 11 10 9 75 B 75 G 75 R 1 2 3 4 5 6 7 8 LT6553 16 15 14 13 12 11 10 9 NOTE: POWER SUPPLY BYPASS CAPACITORS OMITTED FOR CLARITY -3.3V
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Figure 2. RGB Video Selector/Cable Driver
6553i LT/TP 1203 1K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2003

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