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| 74VHCT138A 3-to-8 Decoder/Demultiplexer June 1997 Revised April 1999 74VHCT138A 3-to-8 Decoder/Demultiplexer General Description The VHCT138A is an advanced high speed CMOS 3-to-8 DECODER fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A0, A1 and A2) determine which one of the outputs (O0-O7) will go LOW. When enable input E3 is held LOW or either E1 or E2 is held HIGH, decoding function is inhibited and all outputs go HIGH. E3, E1 and E2 inputs are provided to ease cascade connection and for use as an address decoder for memory systems. Protection circuits ensure that 0V to 7V can be applied to the input pins without regard to the supply voltage and to the output pins with VCC = 0V. These circuits prevent device destruction due to mismatched supply and input/output voltages. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. Features s High Speed: tPD = 7.6 ns (typ) at VCC = 5V s Low power dissipation: ICC = 4 A (max.) at TA = 25C s Power down protection is provided on all inputs and outputs s Pin and function compatible with 74HCT138 Ordering Code: Order Number 74VHCT138AM 74VHCT138ASJ 74VHCT138AMTC 74VHCT138AN Package Number M16A M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Pin Descriptions Pin Names A0-A2 E1-E2 E3 O0-O7 Description Address Inputs Enable Inputs Enable Input Outputs (c) 1999 Fairchild Semiconductor Corporation DS500014.prf www.fairchildsemi.com 74VHCT138A Truth Table Inputs E1 H X X E2 X H X E3 X X L A0 X X X A1 X X X A2 X X X O0 H H H O1 H H H O2 H H H Outputs O3 H H H O4 H H H O5 H H H O6 H H H O7 H H H L L L L L L L L H H H H L H L H L L H H L L L L L H H H H L H H H H L H H H H L H H H H H H H H H H H H H H H H L L L L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial L L L L H H H H L H L H L L H H H H H H H H H H H H H H H H H H H H H H L H H H H L H H H H L H H H H L Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 74VHCT138A Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) (Note 2) (Note 3) Input Diode Current (IIK) Output Diode Current (IOK) (Note 4) DC Output Current (IOUT) DC VCC/GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260C 20 mA 25 mA 75 mA -65C to +150C -0.5V to 7.0V -0.5V to VCC+ 0.5V -20 mA -0.5V to +7.0V -0.5V to +7.0V Recommended Operating Conditions (Note 5) Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) (Note 3) (Note 2) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC = 5.0V 0.5V 0 20 ns/V Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 2: VCC = 0V. Note 3: HIGH or LOW state. IOUT absolute maximum rating must be observed. Note 4: VOUT 4.5V to +5.5V 0V to +5.5V 0V to VCC 0V to 5.5V -40C to +85C DC Electrical Characteristics Symbol VIH VIL VOH VOL IIN ICC ICCT IOFF Parameter VCC (V) 4.5 - 5.5 4.5 4.5 4.5 4.5 0 - 5.5 5.5 5.5 0 4.4 3.94 0.0 0.1 0.36 0.1 4.0 1.35 0.5 4.5 TA = 25C Min 2.0 0.8 4.4 3.80 0.1 0.44 1.0 20.0 1.50 5.0 Typ Max TA = -40C to +85C Min 2.0 0.8 Max Units V V V V A A mA A VIN = VIH IOH = -50 A or VIL IOH = -8 mA VIN = VIH IOL = 50 A or VIL IOL = 8 mA VIN = 5.5V or GND VIN = VCC or GND Vin = 3.4V other inputs = VCC or GND VOUT = 5.5V Conditions HIGH Level Input Voltage 4.5 - 5.5 LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Leakage Current Quiescent Supply Current Maximum ICC/Input Output Leakage Current AC Electrical Characteristics Symbol tPLH tPHL tPLH tPHL tPLH tPHL CIN CPD Parameter Propagation Delay An to On Propagation Delay E3 to On Propagation Delay E1 or E2 to On Input Capacitance Power Dissipation Capacitance 5.0 0.5 5.0 0.5 VCC (V) 5.0 0.5 TA = 25C Min Typ 7.6 8.1 6.6 7.1 7.0 7.5 4 49 Max 10.4 11.4 9.1 10.1 9.6 10.6 10 TA = -40C to +85C Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 12.0 13.0 10.5 11.5 11.0 12.0 10 Units Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF VCC = Open (Note 6) ns ns ns pF pF Note 6: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC. 3 www.fairchildsemi.com 74VHCT138A Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 4 74VHCT138A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 5 www.fairchildsemi.com 74VHCT138A 3-to-8 Decoder/Demultiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. |
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