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October 1997 FDV302P Digital FET, P-Channel General Description This P-Channel logic level enhancement mode field effect transistor is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, this one P-channel FET can replace several digital transistors with different bias resistors such as the DTCx and DCDx series. Features -25 V, -0.12 A continuous, -0.5 A Peak. RDS(ON) = 13 @ VGS= -2.7 V RDS(ON) = 10 @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Compact industry standard SOT-23 surface mount package. Replace many PNP digital transistors (DTCx and DCDx) with one DMOS FET. SOT-23 Mark:302 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 D G S Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ,TSTG ESD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current TA = 25oC unless otherwise noted FDV302P -25 -8 Units V V A - Continuous - Pulsed -0.12 -0.5 0.35 -55 to 150 6.0 Maximum Power Dissipation Operating and Storage Temperature Range Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100pf / 1500 Ohm) W C kV THERMAL CHARACTERISTICS RJA Thermal Resistance, Junction-to-Ambient 357 C/W (c) 1997 Fairchild Semiconductor Corporation FDV302P REV. F Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A ID = -250 A, Referenced to 25 o C VDS = -20 V, VGS = 0 V TJ = 55C IGSS Gate - Body Leakage Current (Note) -25 -20 -1 -10 -100 V mV / oC A A nA mV / oC -1.5 13 10 18 A 0.135 S V BVDSS/TJ IDSS VGS = -8 V, VDS= 0 V ID = -250 A, Referenced to 25 oC VDS = VGS, ID = -250 A VGS = -2.7 V, ID = -0.05 A VGS = -4.5 V, ID = -0.2 A TJ =125C -0.65 1.9 -1 10.6 7.9 12 -0.05 ON CHARACTERISTICS VGS(th)/TJ VGS(th) RDS(ON) Gate Threshold Voltage Temp. Coefficient Gate Threshold Voltage Static Drain-Source On-Resistance ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD On-State Drain Current Forward Transconductance VGS = -2.7 V, VDS = -5 V VDS = -5 V, ID= -0.2 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note) 11 7 1.4 pF pF pF SWITCHING CHARACTERISTICS Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -6 V, ID = -0.2 A, VGS = -4.5 V, RGEN = 50 5 8 9 5 12 16 18 10 0.31 ns ns ns ns nC nC nC VDS = -5 V, ID = -0.2 A, VGS = -4.5 V 0.22 0.11 0.04 DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.2 A (Note) -0.2 -1 -1.5 A V Note: Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. FDV302P REV. F Typical Electrical Characteristics 0.2 2 DRAIN-SOURCE ON-RESISTANCE -I D , DRAIN-SOURCE CURRENT (A) V GS = -5.0V -4.5 0.15 -4.0 -3.5 RDS(ON), NORMALIZED -3.0 -2.7 V GS = -2.0 V 1.5 -2.5 -2.7 -3.0 0.1 -2.5 1 0.05 -2.0 -4.0 -3.5 -4.5 0 0 1 2 3 4 0.5 0 0.05 0.1 -I D , DRAIN CURRENT (A) 0.15 0.2 -VDS , DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. R DS(ON) ,ON-RESISTANCE (OHM) 1.6 R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 25 I D = -0.05A 1.4 TA= 25C 20 ID = -0.05A 125 C V GS = -2.7V 1.2 15 1 10 0.8 5 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 0 0 1 -V 2 GS 3 4 5 6 7 8 ,GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On Resistance Variation with Gate-To- Source Voltage. 0.08 25C -ID , DRAIN CURRENT (A) 0.06 -I S , REVERSE DRAIN CURRENT (A) V DS = -5V TA = -55C 125C 0.5 VGS = 0V 0.1 TJ = 125C 25C 0.04 0.01 -55C 0.001 0.02 0 0.5 1 -V GS 1.5 2 2.5 3 , GATE TO SOURCE VOLTAGE (V) 0.0001 0.2 0.4 0.6 0.8 1 1.2 -VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDV302P REV. F Typical Electrical And Thermal Characteristics 8 -V GS , GATE-SOURCE VOLTAGE (V) 25 I D = -0.2A 6 VDS = -5V -15 -10 CAPACITANCE (pF) 15 10 C iss Coss 4 5 3 2 2 f = 1 MHz V GS = 0 V 0.3 1 2 5 0 0 0.1 0.2 0.3 0.4 0.5 Q g , GATE CHARGE (nC) Crss 10 15 25 1 0.1 -V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 1 0.5 L N) IM IT 5 -ID , DRAIN CURRENT (A) 1m S(O 10 0m s s POWER (W) 4 0.2 0.1 0.05 SINGLE PULSE R JA =357 C/W TA = 25C RD 1s 10 s 3 2 0.02 0.01 VGS = -2.7V SINGLE PULSE RJA = 357 C/W TA = 25C 1 2 5 DC 1 0 0.001 0.01 0.1 1 10 100 300 10 15 20 30 40 SINGLE PULSE TIME (SEC) - VDS , DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 0.001 0.01 0.1 t1 , TIME (sec) 1 10 D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk) R JA (t) = r(t) * R JA R JA = 357 C/W t1 TJ - T t2 = P * R JA (t) Duty Cycle, D = t1 /t 2 A 100 300 Figure 11. Transient Thermal Response Curve. FDV302P REV. F |
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