![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
HV214 HV214 Initial Release 250V Low Charge Injection 8-Channel High Voltage Analog Switch Features HVCMOS(R) technology for high performance Very low quiescent power dissipation - 10A Low parasitic capacitances DC to 10MHz analog signal frequency -60dB typical output off isolation at 5MHz CMOS logic circuitry for low power Excellent noise immunity On-chip shift register, latch and clear logic circuitry Flexible high voltage supplies Surface mount package available General Description The Supertex HV214 is a low charge injection 8-channel high voltage analog switch integrated circuit (IC) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as medical ultrasound imaging, piezoelectric transducer drivers, inkjet printer heads and optical MEMS modules. Input data is shifted into an 8-bit shift register that can then be retained in an 8-bit latch. To reduce any possible clock feedthrough noise, the latch enable bar should be left high until all bits are clocked in. Data are clocked in during the rising edge of the clock. Using HVCMOS(R) technology, this device combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. The device is suitable for various combinations of high voltage supplies, e.g., VPP/VNN: +40V/-210V, +125V/-125V, +210V/-40V. Applications Medical ultrasound imaging Piezoelectric transducer drivers Inkjet printer heads Optical MEMS modules Block Diagram DIN CLK LATCHES D LE CL D LE CL D LE CL D LE CL D LE CL D LE CL D LE CL D LE CL LEVEL SHIFTERS OUTPUT SWITCHES SW0 SW1 SW2 SW3 8 BIT SHIFT REGISTER SW4 SW5 DOUT SW6 SW7 VNN VPP VDD LE CL 07/26/02 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. 1 HV214 Ordering Information Package Options VPP - VNN 250V 28-lead plastic chip carrier HV214PJ 48-lead TQFP HV214FG Die HV214X Electrical Characteristics Symbol Parameter Min Typ Max Units Conditions DC Electrical Characteristics (TA=25 C, over recommended operating conditions unless otherwise noted) 55 49 ISIG=5.0mA ISIG=200mA ISIG=5.0mA ISIG=200mA ISIG=5.0mA ISIG=200mA % 10 300 500 50 -50 50 -50 2.0 50 7.0 A mV mV A A A A A KHz VPP = +40V, VNN = -210V VPP = +125V, VNN = -125V VPP = +210V, VNN = -40V RONS Small signal switch on-resistance 42 36 38 32 RONS RONL ISOL Small signal switch on-resistance Large signal switch on-resistance Switch off leakage per switch DC offset switch off DC offset switch on 23 20 ISIG = 5mA, VPP = +125V, VNN = -125V VSIG = VPP-10V, ISIG = 1A VSIG = VPP-10V and VNN+10V RLOAD = 100K RLOAD = 100K All switches off All switches off All switches on, ISW = 5mA All switches on, ISW = 5mA VSIG duty cycle 0.1% Duty cycle = 50% VPP=+40V, VNN=-210V VPP=+125V, VNN=-125V IPPQ INNQ IPPQ IPPQ fSW IPP Quiescent VPP supply current Quiescent VNN supply current Quiescent VPP supply current Quiescent VNN supply current Switch output peak current Output switch frequency Average VPP supply current 5.0 5.0 -7.0 mA VPP=+210V, VNN=-40V VPP=+40V, VNN=-210V VPP=+125V, VNN=-125V VPP=+210V, VNN=-40V INN IDDQ IDD ISOR ISINK CIN TA Average VNN supply current Quiescent VDD supply current Average VDD supply Current Data out source current Data out sink current Logic input capacitance Ambient temperature range 0 0.45 0.45 -5.0 -5.0 10 4.0 A mA mA mA 10 70 pF C All output switches are turning On and Off at 50Khz with no load. fCLK = 5MHz, VDD = 5.0V VOUT = VDD-0.7V VOUT = 0.7V 2 HV214 Electrical Characteristics Symbol Parameter Min Typ Max Units Conditions AC Electrical Characteristics tSD tWLE tDO tWCL tSU tH fCLK tR, tF TON TOFF dv/dt Set up time before LE* Rises Time width of LE* Clock delay time to data out Time width of CL Set up time data to clock Hold time data from Clock Clock frequency Clock rise and fall times Turn on time Turn off time (VDD=5V, TA=25 C, over recommended operating conditions unless otherwise noted) 150 150 150 150 15 35 5.0 50 5.0 5.0 20 8.0 ns ns ns ns ns ns MHz ns s s VSIG = VPP-10V, RLOAD =10k VSIG = VPP-10V, RLOAD =10k VPP = +40V, VNN = -210V V/ns VPP = +125V, VNN = -125V VPP = +210V, VNN = -40V dB dB 300 5.0 25 12 38 17 50 200 200 mA pF pF mV f = 5.0MHz, 1K/15pF load f = 5.0MHz, 50 load f = 5.0MHz, 50 load 300ns pulse width, 2.0% duty cycle 0V, f = 1MHz 0V, f = 1MHz VPP = +40V, VNN = -210V, RLOAD = 50 VPP = +125V, VNN = -125V, RLOAD = 50 VPP = +210V, VNN = -40V, RLOAD = 50 50% duty cycle, fDATA = fCLK/2 Maximum VSIG slew rate -30 -58 -60 20 20 KO KCR IID CSG(OFF) CSG(ON) +VSPK -VSPK +VSPK -VSPK +VSPK -VSPK Off isolation Switch crosstalk Output switch isolation diode current Off capacitance SW to Gnd On capacitance SW to Gnd Output Voltage Spike 200 200 200 200 mV mV Absolute Maximum Ratings* VDD Logic power supply voltage VPP - VNN Supply voltage VPP Positive high voltage supply VNN Negative high voltage supply Logic input voltages Analog Signal Range Peak analog signal current/channel Storage temperature Power dissipation -0.5V to +15V 260V -0.5V to VNN +250V +0.5V to -260V -0.5V to VDD +0.3V VNN to VPP 2.5A -65C to +150C 28-pin PLCC 48 lead TQFP 1.2W 1.0W * Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. 3 HV214 Operating Conditions Symbol VDD VPP VNN VIH VIL VSIG TA Parameter Logic power supply voltage Positive high voltage supply Negative high voltage supply High-level input voltage Low-level input voltage Analog signal voltage peak to peak Operating free air-temperature Value 4.5V to 13.2V 40V to VNN+ 250V -40V to -210V VDD -1.5V to VDD 0V to 1.5V VNN +10V to VPP -10V 0C to 70C Power Up/Down Sequence: 1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2 VSIG must be VNN VSIG VPP or floating during power up/down transistion. 3 Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec. Truth Table D0 L H L H L H L H L H L H L H L H X X D1 D2 D3 D4 D5 D6 D7 LE L L L L L L L L L L L L L L L L H X CL L L L L L L L L L L L L L L L L L H SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON HOLD PREVIOUS STATE OFF OFF OFF OFF OFF OFF OFF OFF X X Notes: X X X X X X X X X X X X 1. The eight switches operate independently. 2. Serial data is clocked in on the L H transition CLK. 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch. 4. DOUT is high when switch 7 is on. 5. Shift register clocking has no effect on the switch states if LE is H. 6. The clear input overrides all other inputs. 4 HV214 Logic Timing Waveforms DN-1 DATA IN 50% DN 50% DN+1 LE 50% 50% t WLE t SD 50% 50% th t DO CLOCK t SU DATA OUT 50% t OFF t ON OFF V OUT (TYP) ON 90% 10% CLR 50% t WCL 50% Block Diagram LATCHES DIN D LE CL D LE CL D LE CL D LE CL D LE CL D LE CL D LE CL D LE CL LEVEL SHIFTERS OUTPUT SWITCHES SW0 CLK SW1 SW2 SW3 8 BIT SHIFT REGISTER SW4 SW5 DOUT SW6 SW7 VNN VPP VDD LE CL 5 HV214 Test Circuits VPP -10V RL VOUT VOUT 10K ISOL VPP -10 VNN +10 100K RL VPP VNN VPP VNN VDD GND 5V VPP VNN VPP VNN VDD GND 5V VPP VNN VPP VNN VDD GND 5V Switch OFF Leakage DC Offset ON/OFF TON /TOFF Test Circuit VIN = 10 VP-P @5MHz VSIG VOUT RL IID VNN VIN = 10 VP-P @5MHz 50 NC 50 VPP VNN VPP VNN VDD GND VOUT VIN 5V VPP VNN VPP VNN VDD GND 5V VPP VNN VPP VNN VDD GND VOUT VIN 5V KO = 20Log KCR = 20Log OFF Isolation Isolation Diode Current Crosstalk VOUT VOUT 1000pF +VSPK VOUT -VSPK 50 VSIG 1K RL VPP VNN VPP VNN VDD GND 5V VPP VNN VPP VNN VDD GND 5V Q = 1000pF x VOUT Charge Injection Output Voltage Spike 6 HV214 Pin Configurations HV214 28 Pin J-Lead Pin Function 1 SW3 2 SW3 3 SW2 4 SW2 5 SW1 6 SW1 7 SW0 8 SW0 9 N/C 10 VPP 11 N/C 12 VNN 13 GND 14 VDD Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4 Package Outlines 25 26 27 24 23 22 21 20 19 18 HV202, HV203 17 16 15 14 13 12 28 1 2 3 4 5 6 7 8 9 10 11 top view 28-pin J-Lead Package Pin Configurations HV214 48-Pin TQFP Pin Function 1 SW5 2 N/C 3 SW4 4 N/C 5 SW4 6 N/C 7 N/C 8 SW3 9 N/C 10 SW3 11 N/C 12 SW2 13 N/C 14 SW2 15 N/C 16 SW1 17 N/C 18 SW1 19 N/C 20 SW0 21 N/C 22 SW0 23 N/C 24 VPP Pin 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Function VNN N/C N/C GND VDD N/C N/C N/C DIN CLK LE CLR DOUT N/C SW7 N/C SW7 N/C SW6 N/C SW6 N/C SW5 N/C Package Outlines Pin 1 HV202 HV214 Pin 12 top view 48-pin TQFP Pin #1 07/26/02rev.2b (c)2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 7 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 * FAX: (408) 222-4895 www.supertex.com |
Price & Availability of HV214
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |