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| PD 9.1663 PRELIMINARY l l l l l l IRFR/U9310 HEXFET(R) Power MOSFET D P-Channel Surface Mount (IRFR9310) Straight Lead (IRFU9310) Advanced Process Technology Fast Switching Fully Avalanche Rated VDSS = -400V G S RDS(on) = 7.0 ID = -1.8A Description Third Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D -P a k T O -2 52 A A I-P a k TO -2 5 1 A A Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. -1.8 -1.1 -7.2 50 0.40 20 92 -1.8 5.0 -24 -55 to + 150 300 (1.6mm from case ) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount)** Junction-to-Ambient Typ. --- --- --- Max. 2.5 50 110 Units C/W 7/30/97 IRFR/U9310 Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS I GSS Qg Q gs Q gd t d(on) tr t d(off) tf LD LS Ciss Coss Crss Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. -400 --- --- -2.0 0.91 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- -0.41 --- --- --- --- --- --- --- --- --- --- 11 10 25 24 Max. Units Conditions --- V VGS = 0V, ID = -250A --- V/C Reference to 25C, ID = -1mA 7.0 VGS = -10V, ID = -1.1A -4.0 V VDS = VGS, I D = -250A --- S VDS = -50V, I D = -1.1A -100 VDS = -400V, VGS = 0V A -500 VDS = -320V, VGS = 0V, TJ = 125C 100 V GS = 20V nA -100 VGS = -20V 13 ID = -1.1A 3.2 nC VDS = -320V 5.0 VGS = -10V, See Fig. 6 and 13 --- VDD = -200V --- I D = -1.1A ns --- RG = 21 --- RD = 180, See Fig. 10 D Between lead, 4.5 --- 6mm (0.25in.) nH G from package 7.5 --- and center of die contact S 270 --- VGS = 0V 50 --- pF VDS = -25V 8.0 --- = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD t rr Q rr t on Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- -1.8 showing the A G integral reverse --- --- -7.2 p-n junction diode. S --- --- -4.0 V TJ = 25C, IS = -1.1A, VGS = 0V --- 170 260 ns TJ = 25C, IF = -1.1A --- 640 960 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 57mH RG = 25, IAS = -1.8A. (See Figure 12) ISD -1.1A, di/dt 450A/s, VDD V(BR)DSS, TJ 150C Pulse width 300s; duty cycle 2%. This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 IRFR/U9310 10 TOP -I D , Drain-to-Source Current (A) BOTTOM -I D , Drain-to-Source Current (A) VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V -4.5V 10 VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP 1 1 -4.5V -4.5V 0.1 20s PULSE WIDTH TJ = 25 C 1 10 100 0.1 20s PULSE WIDTH TJ = 150 C 1 10 100 -VDS , Drain-to-Source Voltage (V) -VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 10 2.5 R DS(on) , Drain-to-Source On Resistance (Normalized) ID = -1.8A -I D , Drain-to-Source Current (A) TJ = 25 C TJ = 150 C 1 2.0 1.5 1.0 0.5 0.1 4 5 6 7 V DS = -50V 20s PULSE WIDTH 8 9 10 0.0 -60 -40 -20 VGS = -10V 0 20 40 60 80 100 120 140 160 -VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRFR/U9310 500 -VGS, Gate-to-Source Voltage (V) 400 VGS Ciss Crss Coss = 0V, f = 1MHz = Cgs + Cgd , Cds SHORTED = Cgd = Cds + Cgd 20 ID = -1.1A VDS = -320V VDS = -200V VDS = -80V 16 C, Capacitance (pF) 300 Ciss 12 200 8 Coss 100 4 Crss 0 1 10 100 0 0 4 8 FOR TEST CIRCUIT SEE FIGURE 13 12 16 -VDS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 10 100 OPERATION IN THIS AREA LIMITED BY RDS(on) -ISD , Reverse Drain Current (A) -I D , Drain Current (A) I 10 10us TJ = 150 C 1 100us 1 1ms T = 25 C J 0.1 1.0 V GS = 0 V 2.0 3.0 4.0 5.0 0.1 TC = 25 C TJ = 150 C Single Pulse 10 100 10ms 1000 -VSD,Source-to-Drain Voltage (V) -VDS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRFR/U9310 2.0 VDS VGS 1.6 RD D.U.T. + -I D , Drain Current (A) 1.2 -10V Pulse Width 1 s Duty Factor 0.1 % 0.8 Fig 10a. Switching Time Test Circuit 0.4 VGS 10% td(on) tr t d(off) tf 0.0 25 50 75 100 125 150 T C , Case Temperature ( C) 90% VDS Fig 9. Maximum Drain Current Vs. Case Temperature 10 Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t1 / t 2 2. Peak T J = P DM x Z thJC + T C 0.01 0.00001 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case - RG VDD 1 IRFR/U9310 VDS L 200 D .U .T IA S D R IV E R 0 .0 1 RG VD D A EAS , Single Pulse Avalanche Energy (mJ) 160 ID -0.8A -1.1A BOTTOM -1.8A TOP - 20V tp 120 15V 80 Fig 12a. Unclamped Inductive Test Circuit I AS 40 0 25 50 75 100 125 150 Starting T J, Junction Temperature ( C) tp V(BR)DSS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F -10V QGS VG QGD VGS -3mA Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit + D.U.T. - VDS IRFR/U9310 Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - + RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% [ISD ] *** V GS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS IRFR/U9310 Package Outline TO-252AA Outline Dimensions are shown in millimeters (inches) 6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 6.45 (.245) 5.68 (.224) 6.22 (.245) 5.97 (.235) 1.02 (.040) 1.64 (.025) 1 2 3 0.51 (.020) MIN. 10.42 (.410) 9.40 (.370) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) LEA D AS SIG NME NT S 1 - G AT E 2 - DRA IN 3 - S OUR CE 4 - DRA IN -B 1.52 (.060) 1.15 (.045) 3X 2X 1.14 (.045) 0.76 (.030) 0.89 (.035) 0.64 (.025) 0.25 ( .010) M AMB NOT ES: 0.58 (.023) 0.46 (.018) 2.28 (.090) 4.57 (.180) 1 DIME NSIO NING & T OLE RANCING P ER A NSI Y 14.5M, 1982. 2 CO NTRO LLING DIMENS ION : INCH. 3 CO NFO RMS T O JEDE C O UTLINE TO -252AA . 4 DIME NSIO NS S HO W N ARE BEF O RE SO LD ER DIP , SO LDER DIP MA X. +0.16 (.006). Part Marking Information TO-252AA (D-Pak) E X A M P LE : T H IS IS A N IR F R 120 W IT H A S S E MB L Y LOT C OD E 9U 1P IN T E R N A T IO N A L R E CT IF IE R LO G O A IR F R 12 0 9U 1P F IR S T P O R T ION OF P A R T N U MB E R A S S E MB L Y L O T C OD E S E C O N D P O R T ION OF PART NUMBER IRFR/U9310 Package Outline TO-251AA Outline Dimensions are shown in millimeters (inches) 6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 6.45 (.245) 5.68 (.224) 1.52 ( .060) 1.15 ( .045) 1 -B 2.28 (.090) 1.91 (.075) 9.65 (.380) 8.89 (.350) 2 3 6.22 ( .245) 5.97 ( .235) 1.27 ( .050) 0.88 ( .035) 2.38 (.094) 2.19 (.086) 0.58 (.023) 0.46 (.018) LEAD AS SIG NMENT S 1 - G AT E 2 - DRA IN 3 - S OURCE 4 - DRA IN NOT ES : 1 DIME NSIO NING & T OLE RANCING P ER A NSI Y14.5M, 1982. 2 CO NTRO LLIN G DIMENS ION : INCH. 3 CO NFO RMS TO J EDE C O UT LINE TO -252AA . 4 DIME NSIO NS SHOW N A RE BEF O RE SO LDER DIP , SO LDER DIP MA X. +0.16 (.006). 3X 1.14 (.045) 0.76 (.030) 3X 0.89 (.035) 0.64 (.025) M AMB 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) 2.28 (.090) 2X 0.25 (.010) Part Marking Information TO-251AA (I-Pak) E X A M P LE : TH IS IS A N IR F U1 20 W IT H A S S E M B LY LO T C O D E 9U 1P IN TE RN A T IO N A L R E C T IF IE R LO GO IR F U 120 9U 1P F IR S T P O RT IO N O F P A R T N UM B E R A S S E M B LY LO T C O D E S E C O N D P O R T ION OF PART NUMBER IRFR/U9310 Tape & Reel Information TO-252AA TR TRR TRL 16 .3 ( .64 1 ) 15 .7 ( .61 9 ) 1 6 .3 ( .6 4 1 ) 1 5 .7 ( .6 1 9 ) 1 2 .1 ( .4 76 ) 1 1 .9 ( .4 69 ) F E E D D IR E C TIO N 8 .1 ( .3 1 8 ) 7 .9 ( .3 1 2 ) F E E D D IR E C TIO N N O T ES : 1 . C O N T R O LL IN G D IM E N S IO N : M IL LIM E T E R . 2 . A L L D IM E N S IO N S A R E S H O W N IN M IL L IM E T E R S ( IN C H E S ). 3 . O U T L IN E C O N FO R M S TO E IA -48 1 & E IA -5 4 1 . 1 3 IN C H 16 m m NO T ES : 1 . O U T L IN E C O N F O R M S T O E IA -4 8 1 . WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 7/97 |
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