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| Advanced Power MOSFET FEATURES Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area 175 C Operating Temperature Lower Leakage Current : 10 A (Max.) @ VDS = -60V Low RDS(ON) : 0.22 (Typ.) 1 SFW/I2955 BVDSS = -60 V RDS(on) = 0.3 ID = -9.4 A D2-PAK 2 o I2-PAK 1 3 2 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt o Total Power Dissipation (TA=25 C) * 2 O 1 O 1 O 3 O o o Value -60 -9.4 -6.6 1 O Units V A A V mJ A mJ V/ns W W W/ C o -38 + 20 _ 151 -9.4 4.9 -5.5 3.8 49 0.33 - 55 to +175 Total Power Dissipation (TC=25 C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8" from case for 5-seconds o TJ , TSTG TL o C 300 Thermal Resistance Symbol RJC RJA RJA Characteristic Junction-to-Case Junction-to-Ambient * Junction-to-Ambient Typ. ---Max. 3.06 40 62.5 o Units C/W * When mounted on the minimum pad size recommended (PCB Mount). Rev. B (c)1999 Fairchild Semiconductor Corporation SFW/I2955 Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain("Miller") Charge Min. Typ. Max. Units -60 --2.0 ------------------0.04 ------4.0 465 140 40 11 21 29 20 15 2.9 6.0 ---4.0 -100 100 -10 -100 0.3 -600 215 60 30 50 65 50 19 --nC ns pF A V V nA P-CHANNEL POWER MOSFET Electrical Characteristics (TC=25oC unless otherwise specified) Test Condition VGS=0V,ID=-250A See Fig 7 VDS=-5V,ID=-250A VGS=-20V VGS=20V VDS=-60V VDS=-48V,TC=150 C VGS=-10V,ID=-4.7A VDS=-30V,ID=-4.7A 4 O 4 O o o V/ C ID=-250A VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-30V,ID=-9.4A, RG=18 See Fig 13 VDS=-48V,VGS=-10V, ID=-9.4A See Fig 6 & Fig 12 45 OO 45 OO Source-Drain Diode Ratings and Characteristics Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 1 O 4 O Min. Typ. Max. Units --------80 0.22 -9.4 -38 -3.8 --A V ns C Test Condition Integral reverse pn-diode in the MOSFET TJ=25 C,IS=-9.4A,VGS=0V TJ=25 C,IF=-9.4A diF/dt=100A/s 4 O o o Notes ; 1 O Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature 2 O L=2.0mH, I AS=-9.4A, V DD=-25V, R G=27*, Starting T J =25ooC 3 _ _ _ O ISD < -9.4A, di/dt < 250A/ s, VDD < BVDSS , Starting T J =25 C _ 4 O Pulse Test : Pulse Width = 250 s, Duty Cycle < 2% 5 Essentially Independent of Operating Temperature O P-CHANNEL POWER MOSFET Fig 1. Output Characteristics V GS - 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom : - 4.5 V SFW/I2955 Fig 2. Transfer Characteristics [A] 1 10 [A] Top : 1 10 -ID , Drain Current -ID , Drain Current 175 oC 0 10 0 10 @ Notes : 1. 250 s Pulse Test 2. T = 25 oC C -1 10 -1 10 25 oC @ Notes : 1. V = 0 V GS - 55 oC 2. V = -30 V DS 3. 250 s Pulse Test 100 1 10 -1 10 2 4 6 8 10 -VDS , Drain-Source Voltage [V] [A] -VGS , Gate-Source Voltage [V] RDS(on) , [ ] Drain-Source On-Resistance Fig 3. On-Resistance vs. Drain Current 0.4 Fig 4. Source-Drain Diode Forward Voltage -IDR , Reverse Drain Current 0.3 11 0 VGS = -10 V 0.2 10 0 1 5 oC 7 2C 5 1 -1 0 o 0.1 VGS = -20 V 0.0 0 10 20 30 40 50 60 70 @ Note : T = 25 oC J @Nts: oe 1 VGS = 0 V . us et 2 2 0 s P l e T s .5 05 . 10 . 15 . 20 . 25 . 30 . 35 . -ID , Drain Current [A] -VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage Ciss= Cgs+ Cgd ( Cds= s o t d ) hre Coss= Cds+ Cgd Crss= Cgd Fig 6. Gate Charge vs. Gate-Source Voltage [V] 800 [pF] 600 C oss 400 @Nts: oe 1 VGS = 0 V . C rss 200 2 f=1Mz . H -VGS , Gate-Source Voltage C iss 1 0 VDS = - 2 V 1 3 VDS = - 0 V V =-8V 4 DS Capacitance 5 @ N t s : ID = 9 4 A oe -. 0 0 2 4 6 8 1 0 1 2 1 4 1 6 00 10 101 -VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC] SFW/I2955 -BVDSS , (Normalized) Drain-Source Breakdown Voltage P-CHANNEL POWER MOSFET Fig 8. On-Resistance vs. Temperature Drain-Source On-Resistance 2.5 Fig 7. Breakdown Voltage vs. Temperature 1.2 RDS(on) , (Normalized) 2.0 1.1 1.5 1.0 1.0 0.9 @ Notes : 1. V = 0 V GS 2. I = -250 A D -50 -25 0 25 50 75 100 125 o 150 175 200 0.5 @ Notes : 1. V = -10 V GS 2. I = -4.7 A D 0.8 -75 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 TJ , Junction Temperature [ C] TJ , Junction Temperature [oC] [A] Fig 9. Max. Safe Operating Area 2 10 Fig 10. Max. Drain Current vs. Case Temperature [A] 10 -ID , Drain Current Operation in This Area is Limited by R DS(on) 0.1 ms 1 ms -ID , Drain Current 102 8 1 10 10 ms DC @ Notes : 1. T = 25 oC C 2. T = J 3. Single Pulse 175 oC 6 4 0 10 2 -1 10 0 10 101 0 25 50 75 100 125 150 175 -VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC] Fig 11. Thermal Response Thermal Response D=0.5 100 0.2 0.1 0.05 @ Notes : 1. Z J C (t)=3.06 o C/W Max. 2. Duty Factor, D=t /t2 1 3. TJ M -TC =PD M *Z J C (t) P. DM t1. t2. single pulse (t) , 10- 1 Z JC 0.02 0.01 10- 5 10- 4 10- 3 10- 2 10- 1 100 101 t 1 , Square Wave Pulse Duration [sec] P-CHANNEL POWER MOSFET Fig 12. Gate Charge Test Circuit & Waveform SFW/I2955 " Current Regulator " 50K 12V 200nF 300nF Same Type as DUT VGS Qg -10V VDS VGS DUT -3mA Qgs Qgd R1 Current Sampling (IG) Resistor R2 Current Sampling (ID) Resistor Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL Vout Vin RG DUT -10V Vout 90% t on t off tr td(off) tf VDD ( 0.5 rated VDS ) td(on) Vin 10% Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms LL VDS Vary tp to obtain required peak ID BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD tp ID VDD Time VDS (t) RG DUT -10V tp C VDD ID (t) IAS BVDSS SFW/I2955 P-CHANNEL POWER MOSFET Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT -IS L Driver RG VGS Compliment of DUT (N-Channel) VGS VDD * dv/dt controlled by "RG" * IS controlled by Duty Factor "D" VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IS ( DUT ) IRM di/dt IFM , Body Diode Forward Current Vf VDS ( DUT ) Body Diode Forward Voltage Drop Body Diode Recovery dv/dt VDD TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM DISCLAIMER ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 TinyLogicTM UHCTM VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. |
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