View U5021M_61110.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Features
* * * * * * * * *
Low Current Consumption: IDD < 100 A RC Oscillator Internal Reset During Power-up and Supply Voltage Drops (POR) "Short" Trigger Window for Active Mode, "Long" Trigger Window for Sleep Mode Cyclical Wake-up of the Microcontroller in Sleep Mode Trigger Input Single Wake-up Input Reset Output Enable Output
Digital Window Watchdog Timer U5021M
Description
The digital window watchdog timer, U5021M, is a CMOS integrated circuit. In applications where safety is critical, it is especially important to monitor the microcontroller. Normal microcontroller operation is indicated by a cyclically transmitted trigger signal, which is received by a window watchdog timer within a defined time window. A missing or a wrong trigger signal causes the watchdog timer to reset the microcontroller. The IC is tailored for microcontrollers which can work in both full-power and sleep mode. With an additional voltage monitoring (power-on reset and supply voltage drop reset), the U5021M offers a complete monitoring solution for microsystems in automotive and industrial applications.
Rev. 4756C-AUTO-09/04
Figure 1. Block Diagram with External Ciruit
C VDD R1 VDD OSC 8 C1 Reset 5 RC Oscillator OSC 6 10 nF
Microcontroller Trigger 2
State machine OSC Input signal conditioning POR Power-on reset POR Test logic 4 Enable External switching circuitry
Mode 3
Wake-up
1
7 GND
Pin Configuration
Figure 2. Pinning SO8
1 2 3 4 8 7 6 5 OSC GND VDD RESET
WAKE-UP TRIG MODE ENA
2
U5021M
4756C-AUTO-09/04
U5021M
Pin Description
Pin 1 Symbol WAKE-UP Function Wake-up input (pull-down resistor) There is one digitally debounced wake-up input. During the long watchdog window, each signal slope at the input initiates a reset pulse at pin 5. Trigger input (pull-up resistor) It is connected to the microprocessor's trigger signal. Mode input (pull-up resistor) The processor's mode signal initiates the switchover between the long and the short watchdog time. Enable output (push-pull) It is used for the control of peripheral components. It is activated after the processor triggers three times correctly. Reset output (open drain) Resets the processor in the case of a trigger error or if a wake-up pulse occurs during the long watchdog period. Supply voltage Ground, reference voltage RC oscillator
2 3
TRIG MODE
4
ENA
5 6 7 8
RESET VDD GND OSC
Functional Description
Supply Voltage, Pin 6
The U5021M requires a stabilized supply voltage VDD = 5 V 5% to comply with its electrical characteristics. An external buffer capacitor of C = 10 nF may be connected between pin 6 and GND.
RC Oscillator, Pin 8
The clock frequency, f, can be adjusted by the components R1 and C1 according to the formula:
1 f = -t
where t = 1.35 + 1.57 R1 (C1 + 0.01) R1 in k, C1 in nF and t in s The clock frequency determines all time periods of the logic part as shown in the table "Electrical Characteristics" under the subheading "Timing" on page 9. With an appropriate component selection, the clock frequency, f, is nearly independent of the supply voltage as shown in Figure 3 on page 4. Frequency tolerance fmax = 10% with R1 1%, C1 = 5%
3
4756C-AUTO-09/04
Figure 3. Period t versus R1, at C1 = 500 pF
1000.00
100.00
t (s)
10.00
4.5 V 5.0 V 5.5 V C1 = 500 pF
1.00 1 10 100 1000
R1 (k)
Figure 4. Power-on Reset and Switch-over Mode
Pin 6 VDD
t0
Reset Out
t6
Pin 5
t1
Mode
Pin 3
Supply Voltage Monitoring, Pin 5
During ramp-up of the supply voltage and in the case of supply-voltage drops the integrated power-on reset (POR) circuitry sets the internal logic to a defined basic status and generates a reset pulse at the reset output, pin 5. A hysteresis in the POR threshold prevents the circuit from oscillating. During ramp-up of the supply voltage, the reset output stays active for a specified period of time (t0) in order to bring the microcontroller into its defined reset status (see Figure 4). Pin 5 has an open-drain output. The switch-over mode time enables the synchronous operation of microcontroller and watchdog. When the power-on reset time has elapsed, the watchdog has to be switched to monitoring mode by the microcontroller by a "low" signal transmitted to the mode pin (pin 3) within the time-out period, t1. If the low signal does not occur within t1 (see Figure 4), the watchdog generates a reset pulse, t6, and t1 starts again. Microcontroller and watchdog are synchronized with the switch-over mode time, t1, each time a reset pulse is generated.
Switch-over Mode Time, Pin 3
4
U5021M
4756C-AUTO-09/04
U5021M
Microcontroller in Active Mode
Monitoring with the "Short" Trigger Window
After the switch-over mode the watchdog operates in short watchdog mode and expects a trigger pulse from the microcontroller within the defined time window, t3, (enable time). The watchdog generates a reset pulse which resets the microcontroller if * * * the trigger pulse duration is too long the trigger pulse is within the disable time, t2 there is no trigger pulse
Figure 5 shows the pulse diagram with a missing trigger pulse.
Figure 5. Pulse Diagram with no Trigger Pulse During the Short Watchdog Time
VDD Pin 6
t0
Reset out
t1
Pin 5
t3
Mode
t2
Pin 3
Pin 2 Trigger
Figure 6 on page 6 shows a correct trigger sequence. The positive edge of the trigger signal starts a new monitoring cycle with the disable time, t2. To ensure correct operation of the microcontroller, the watchdog needs to be triggered three times correctly before it sets its enable output. This feature is used to activate or deactivate safety-critical components which have to be switched to a certain condition (emergency status) in the case of a microcontroller malfunction. As soon as there is an incorrect trigger sequence, the enable signal is reset and it takes a sequence of three correct triggers before enable is active.
Microcontroller in Sleep Mode
Monitoring with the "Long" Trigger Window
The long watchdog mode allows cyclical wake-up of the microcontroller during sleep mode. As in short watchdog mode, there is a disable time, t4, and an enable time, t5, in which a trigger signal is accepted. The watchdog can be switched from the short trigger window to the long trigger window with a "high" potential at the mode pin (pin 3). In contrast to the short watchdog mode, the time periods are now much longer and the enable output remains inactive so that other components can be switched off to effect a further decrease in current consumption. As soon as a wake-up signal at the wake-up input (pins 1) is detected, the long watchdog mode ends, a reset pulse wakes-up the sleeping microcontroller and the normal monitoring cycle starts with the mode switch-over time.
5
4756C-AUTO-09/04
Figure 6. Pulse Diagram of a Correct Trigger Sequence During the Short Watchdog Time
VDD Pin 6
t0
Reset out
t1
Pin 5
t3 t2 t2
Pin 3 Pin 2
Mode
Trigger
ttrig
Enable Pin 4
Figure 7 shows the switch-over from the short to the long watchdog mode. The wake-up signal during the enable time, t5, activates a reset pulse, t6. The watchdog can be switched back from the long to the short watchdog mode with a low potential at the mode pin (pin 3).
Figure 7. Pulse Diagram of the Long Watchdog Time
t6
Reset out
t1
Pin 5
Wake-up
Pins 1
t4
Mode
t5
Pin 3
t2
Trigger Pin 2
Enable
Pin 4
6
U5021M
4756C-AUTO-09/04
U5021M
State Diagram
The kernel of the watchdog is a finite state machine. Figure 8 shows the state diagram with all possible states and transmissions. Many transmissions are controlled by an internal timer. The numbers for the time-outs are the same as on the pulse diagrams.
Figure 8. State Diagram
Reset state
time out t 0 mode = 1
Mode switch state
mode = 0
Short window disable state
mode = 0
Long window disable state
time out t 1 trg_ok = 1
time out t 2 mode = 1 mode = 0
time out t 4 trg_ok = 1
time out t 6
trg = 0 time out t 3
Short window enable state
trg_err = 1
Long window enable state
trg_err = 1
Reset out state
time out t 5 or wedge = 1 Note: "mode" and "trg" are the debounced input signals from the pins MODE and TRG trg_ok = 1 after the rising edge of the trg signal trg_err = 1 when the trg signal low period is too long
trg = 0 or wedge = 1
wedge = 1 after detecting the debounced changing of a signal level from the WUP pin every state change restarts the internal timer
7
4756C-AUTO-09/04
Absolute Maximum Ratings
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Supply voltage Output current Input voltage Ambient temperature range Storage temperature range Symbol VDD IOUT VIN Tamb Tstg Value 6.5 2 -0.4 V to VDD +0.4 V -40 to +125 -55 to +150 Unit V mA V C C
Thermal Resistance
Parameters Junction ambient Symbol RthJA Value 180 Unit K/W
Electrical Characteristics
VDD = 5 V; Tamb = -40C to +85C; reference point is pin 7, unless otherwise specified
Parameters Supply voltage Current consumption Power-on reset R1 = 66 k Release reset state with rising voltage Get reset state with falling voltage Power-on reset hysteresis Reset level for low VDD Inputs Logical "high" Logical "low" Hysteresis Input voltage range Input current Input current Outputs Maximum output current Logical output "low" Logical output "high" Leakage current IOUT = -1 mA IOUT = -1 mA VOUT = 5 V 4, 5 4, 5 4 5 IOUT VOL VOH Ileak VDD 0.2 2 -2 2 0.2 mA V V A 2, 3 1 VDD = 1 V to VPOR1 IRST = -300 A 1, 2, 3 VIH VIL VIN_hys VIN I IN1 I IN2 0.6 -0.3 5 -20 3.4 1.6 1.4 VDD + 0.3 20 -5 V V V V A A Test Conditions Pin 6 6 6 6 Symbol VDD IDD VPOR1 VPOR2 VPOR_hys VRST 3.9 3.8 40 Min. 4.5 Typ. Max. 5.5 60 4.5 4.4 200 0.1 Unit V A V V mV VDD
8
U5021M
4756C-AUTO-09/04
U5021M
Electrical Characteristics (Continued)
VDD = 5 V; Tamb = -40C to +85C; reference point is pin 7, unless otherwise specified
Parameters Timing Frequency deviation(1) Debounce time Debounce time Maximum trigger pulse length Power-up reset time Switch over mode time Disable time Enable time Disable time Enable time Reset-out time Note: Short watchdog window Short watchdog window Long watchdog window Long watchdog window R1 = 66 k, C1 = 470 pF, VDD = 4.5 V to 5.5 V 2, 3 1 ttrgmax to t1 t2 t3 t4 t5 t6 f 3 96 45 201 1,112 130 124 71,970 30,002 40 5 4 128 % Cycle Cycle Cycle Cycle Cycle Cycle Cycle Cycle Cycle Cycle Test Conditions Pin Symbol Min. Typ. Max. Unit
1. Frequency deviation also depends on the tolerances of the external components
Ordering Information
Extended Type Number U5021M-NFP Package SO8 Remarks -
Package Information
Package SO8
Dimensions in mm
5.00 4.85 1.4 0.4 1.27 3.81 8 5 0.25 0.10 0.2 3.8 6.15 5.85 5.2 4.8 3.7
technical drawings according to DIN specifications
1
4
9
4756C-AUTO-09/04
Revision History
Changes from Rev. 4756A-AUTO-11/03 to Rev. 4756B-AUTO-07/04 Changes from Rev. 4756B-AUTO-07/04 to Rev. 4756C-AUTO-09/04
Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. 1. Electrical Characteristics Table, page 8, row "Reset capability" added
1. Electrical Characteristics Table, page 8, row "Reset capability" changed in "Reset level for low VDD"
10
U5021M
4756C-AUTO-09/04
Atmel Corporation
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600
Atmel Operations
Memory
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314
RF/Automotive
Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759
Regional Headquarters
Europe
Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500
Microcontrollers
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60
Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom
Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80
Asia
Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369
ASIC/ASSP/Smart Cards
Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743
Japan
9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581
Literature Requests
www.atmel.com/literature
Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems.
(c) Atmel Corporation 2004. All rights reserved. Atmel (R) and combinations thereof are the registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper.
4756C-AUTO-09/04

▲Up To Search▲

Price & Availability of U5021M

	To Download U5021M Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .