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| DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT PC667 10-BIT D/A CONVERTER The PC667 is high-speed and high-precision 10-bit D/A converter. Clock rate of the PC667 is 60 Msps. Conversion precision of the PC667 is 1.0 LSB. FEATURES * Resolution * Clock rate * Technology * Power supply * D/A conversion method * Analog output form 10-bit 60 Msps Bi-CMOS +5 V R-2R ladder resistance and segment summing system Voltage output type * Built-in reference voltage generating circuit ORDERING INFORMATION Part Number Package 30-pin plastic shrink DIP (400 mil) PC667CT The information in this document is subject to change without notice. Document No. S11099EJ2V0DS00 (2nd edition) (Previous No. IC-3250) Date Published February 1996 P Printed in Japan The mark 5 shows major revised points. (c) 1993, 1996 PC667 BLOCK DIAGRAM CLK 10 D1 to D10 Input buffer Master-slave F.F. Current switch R-2R ladder AOUT Reference voltage generator Amp. Reference current source Reference resistor VRSET VROUT VREF COMP AVCC DVCC AGND DGND 2 PC667 PIN CONFIGURATION (Top View) D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 DGND CLK NC DGND NC 1 2 3 4 5 6 30 29 28 27 26 25 DVCC AGND AVCC COMP AOUT VREF AVCC AGND DGND VROUT VRSET NC NC NC NC PC667CT 7 8 9 10 11 12 13 14 15 24 23 22 21 20 19 18 17 16 AGND AOUT AVCC CLK COMP DGND DVCC NC VREF VROUT VRSET : Ground for Analog Circuit : Analog Output : Power Supply for Analog Circuit : Clock : Phase Compensation : Ground for Digital Circuit : Power Supply for Digital Circuit : No Connection : Reference Voltage : Reference Voltage Output : Reference Voltage Adjustment D1 to D10 : Digital Signal 3 PC667 PIN FUNCTIONS Input/ Output Input Pin Name D1 to D10 Pin No. 1 to 10 Function Digital signal D1 is MSB, D10 is LSB. Equivalent Circuit DVCC DVCC 500 DGND DGND CLK 12 Input Clock The rising edge of signal input to this pin triggers analog output. DVCC DVCC 500 DGND DGND DVCC 30 -- Power supply for digital circuit DVCC DGND 11, 14, 22 -- Ground for digital circuit DGND VRSET 20 -- Reference voltage adjustment Voltage adjusting pin for the incorporated reference voltage generating circuit. The output voltage of VROUT pin varies according to the voltage applied to this pin. When no adjustment is necessary, connect approx. 0.1 F capacitance between this pin and GND pin. Reference voltage output Voltage output pin of the incorporated reference voltage generating circuit. This pin has high output impedance, and must be connected with a high impedance element. AVCC AVCC 7.5 k AVCC VROUT 3 k 2 k VRSET AGND Reference voltage generator AGND VROUT 21 Output 4 PC667 Input/ Output Input Pin Name VREF Pin No. 25 Function Reference voltage The output full-scale range is set according to the voltage applied to this pin. Apply standard 4.0 V. When no adjustment is necessary, connect the output from VROUT pin directly to this pin. Equivalent Circuit AVCC 5 k 20 A AGND AGND AOUT 26 Output Analog signal Analog signal output pin. AVCC AVCC 112.5 112.5 AGND 225 112.5 R-2R Ladder resistance AGND AGND COMP 27 -- Phase compensation Phase compensating capacitor connection pin for full-scale amplifier. Approx. 0.1 F capacitor must be connected between this pin and AVCC pin. AVCC AVCC 9.7 k AGND AVCC 9.7 k AVCC COMP AGND AGND AVCC 24, 28 -- Power supply for analog circuit AVCC AGND 23, 29 -- Ground for analog circuit AGND NC 13, 15 to 19 -- No Connection 5 PC667 ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = 25 C) Parameter Supply voltage for digital circuit Input voltage Operating ambient temperature Storage temperature Power dissipation Supply voltage for analog circuit Symbol DVCC VI TA Tstg PD AVCC Ratings -0.3 to +6.0 -0.3 to VCC +0.3 -20 to +70 -40 to +125 0.8 (TA = +60 C) DVCC -0.3 to DVCC +0.3 Unit V V C C W V 5 Caution Exposure to Absolute Maximum Rating for extended periods may affect device reliability; exceeding the ratings could cause permanent damage. The parameters apply independently. Recommended Operating Conditions Parameter Supply voltage for digital circuit Supply voltage for analog circuit Reference voltage input pin voltage High-level voltage of digital input Low-level voltage of digital input Conversion clock frequency Phase compensation capacitance Symbol DVCC AVCC VREF VIH VIL fCLK CCOMP 1.0 Conditions MIN. 4.75 4.75 3.8 2.0 0.8 60 TYP. 5.0 5.0 4.0 MAX. 5.25 5.25 4.2 Unit V V V V V MHz F 6 PC667 DC Characteristics and AC Characteristics (TA = -10 to +70 C, DVCC = AVCC = +5 0.25 V) Parameter Resolution Integral linearity error Differential linearity error Supply current Set-up time Hold time Settling time Output delay time Full-scale voltage output Zero-scale voltage output Output resistance Internal reference voltage output voltage Symbol RSL ILE DLE ICC ts th tSET td Vofs Vozs Zout VROUT TA = 25 C, RL = 375 , VREF = 4.0 V VREF = 4.0 V VREF = 4.0 V, RL > 100 k VREF = 4.0 V, RL > 100 k VREF = 4.0 V AVCC = 5.0 V 4.95 3.95 70 3.8 4 85 4.0 TA = 0 to 60 C, VREF = 4.0 V TA = 0 to 60 C, VREF = 4.0 V -1.0 -1.0 50 3 1.5 13 9 13 5.0 4.05 100 4.2 Conditions MIN. TYP. 10 +1.0 +1.0 71 7 7 MAX. Unit Bit LSB LSB mA ns ns ns ns V V V Cautions 1. As for the phase compensation capacitance, capacitor of 1 F should be connected between the phase compensation capacitance pin (COMP) and the power supply pin for analog circuit (AVCC). 2. 3. The internal reference voltage output pin (VROUT) and the reference voltage input pin (VREF) should be shorted. The power supply and GND lines for analog circuit (AVCC and AGND) and those for digital circuit (DVCC and DGND) should be located as separately as possible. 7 PC667 5 Timing Chart tPWH tPWL CLK ts th D1 to D10 Dn tD tSET Dn+1 AOUT An-1 An An+1 Final value 1/2 LSB tSET 1/2 LSB 8 PC667 APPLICATION CIRCUIT EXAMPLE Analog output Power supply for analog circuit 1000 pF 1000 pF 4.7 F AGND DGND 4.7 F 1 F COMP + + Power supply for digital circuit DGND AGND AGND VROUT DVCC AOUT VREF VRSET AVCC AVCC NC NC NC DGND NC NC + PC667CT D10 (LSB) D1 (MSB) DGND CLK Conversion clock 10-bit digital input NC D2 D3 D4 D5 D6 D7 D8 D9 9 PC667 PACKAGE DRAWING 30PIN PLASTIC SHRINK DIP (400 mil) 30 16 1 A 15 K I L J H G F D N M C B M R NOTES 1) Each lead centerline is located within 0.17 mm (0.007 inch) of its true position (T.P.) at maximum material condition. 2) ltem "K" to center of leads when formed parallel. ITEM A B C D F G H I J K L M N R MILLIMETERS 28.46 MAX. 1.78 MAX. 1.778 (T.P.) 0.500.10 0.85 MIN. 3.20.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 10.16 (T.P.) 8.6 0.25 +0.10 -0.05 0.17 0~15 INCHES 1.121 MAX. 0.070 MAX. 0.070 (T.P.) 0.020 +0.004 -0.005 0.033 MIN. 0.1260.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.400 (T.P.) 0.339 0.010 +0.004 -0.003 0.007 0~15 S30C-70-400B-1 10 PC667 RECOMMENDED SOLDERING CONDITIONS When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering processes are used, or if the soldering is performed under different conditions, please make sure to consult with our sales offices. For more details, refer to our document "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (IEI-1207). Through-hole device PC667CT: 30-pin plastic Shrink DIP (400 mil) Process Wave soldering (only to leads) Partial heating method Solder temperature: 260 C or below, Flow time: 10 seconds or less. Terminal temperature: 300 C or below, Heat time: 3 seconds or less (Per each lead). Conditions 5 Caution For through-hole devices, the wave soldering process must be applied only to leads, and make sure that the package body does not get jet soldered. 11 PC667 [MEMO] The application circuits and their parameters are for references only and are not intended for use in actual design-in's. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11 |
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