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NJU3552
PRELIMINARY
4-BIT SINGLE CHIP OTP MICRO CONTROLLER
s GENERAL DESCRIPTION
The NJU3552 is the C-MOS 4-bit Single Chip OTP type Micro Controller with programmable Flash Memory. It is completely compatible with the NJU3502 in function and the pin configuration. Therefore, the NJU3552 is suitable for the final evaluation before NJU3502 mask generation, the small quantity production and short leadtime. * In this data sheet, only OTP programming and the difference between NJU3552 and NJU3502 are mentioned mainly. Therefore the detail function and specification should be referred on the NJU3502 data sheet.
s PACKAGE OUTLINE
NJU3552L
NJU3552M
s FEATURES
q q q q q Internal One Time Programmable ROM 1,024 X 8bits Internal Data RAM 64 X 4bits Wide operating voltage range 2.7V ~ 5.5V Package outline SDIP24 / DMP24 ROM programmer "SUPERPRO/L" by XELTEK co,.
s PIN CONFIGURATION IN OTP PROGRAMMING MODE
Open D0 D1 D2 Open D3 Open PROM CLK REQ VSS
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VDD CNT2 CNT1 D7 Open D6 D5 D4 Open RESET
Note) The pin configuration in Normal operating mode is the same as NJU3502.
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NJU3552
s BLOCK DIAGRAM
-2NJU3552
Interrupt
CPU CORE
Logic
VDD VSS
INT1
STACK X Reg Y Reg AC
EXTI/PE0
TEST RESET
TLU addr X' Reg MUX Y' Reg
PC
INT2
TIMER OTP ROM ALU CPU TIMING GENERATOR 1024 x 8 bit
PRESCALER
OSC
OSC1 OSC2
INT3
SDO/PF0
IR RAM 64 x 4 bit ID
SDI(O)/PF1
SIO
STANDBY CONTROLLER
SCK/CKOUT
PORT_A *3
*1
PORT_B *1 *2
PORT_C
*1 *3
PORT_D *1 *3
*1 refer [INPUT OUTPUT TERMINAL TYPE] *2 Input / Output direction of 4-bit group is changed by the program. *3 Input / Output direction of each bit is selected by mask option.
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PC0
PC1
PC2
PC3
PD0
PD1
NJU3552
s TERMINAL DESCRIPTION IN OTP PROGRAMMING MODE
No. 13 2 - 4, 7, 15 - 17, 21 22, 23 11 10 9 24 12 Note 1) 2) SYMBOL RESET INPUT/OUTPUT INPUT FUNCTION RESET terminal. When the low-level input-signal, the system is initialized.
D0 - D7 CNT1 CNT2 REQ CLK PROM VDD VSS
INPUT/OUTPUT Data bus INPUT INPUT OUTPUT INPUT INPUT -
OTP control input terminal Request output terminal Clock input terminal OTP programming enable terminal Power Source (5V) Power Source (0V)
Use at VDD=5V in OTP programming mode. Non connect anything to the other terminals.
s Difference between NJU3552 (OTP version) and NJU3502 (MASK version)
q Operating mode NJU3552 has two operating modes. One is "Normal operating mode" and the other is "OTP programming mode".
*
Normal operating mode The "TEST" terminal is set to low level. (The terminal is recommended to connect to GND.) Operating voltage range; 2.7V ~ 5.5V. OTP Programming mode User program is read out from or written into the OTP by the universal programmer "SUPERPRO/L" and converting adapter made by XELTEK co,.(USA).
*
q
Option information set in the initialization
When the initialization is performed(RESET terminal is "L"), the operation information stored in option area is set as shown in the following timing chart . The option information is set in the term of 1 / fOSC x 256clock after RESET releasing and oscillation stability time. After information set, the program counter is set to 0000H and the NJU3552 operates in normal. [ TIMING CHART ] Oscillation Stability Time
Oscillator Clock
Option information setting 1/fOSCx256clock
Normal Operation
Oscillation Start
PC=0000H
RESET
fOSC=4MHz
about 64sec
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NJU3552
s ABSOLUTE MAXIMUM RATINGS
(Ta=25C) PARAMETER Supply Voltage Input Voltage Output Voltage Operating Temperature Storage Temperature SYMBOL VDD VIN VOUT Topr Tstg RATINGS -0.3 ~ +7.0 -0.3 ~ VDD + 0.3 -0.3 ~ VDD + 0.3 -20 ~ +75 -55 ~ +125 UNIT V V V C C
Note) The difference of electrical characteristics between NJU3552 (OTP version) and NJU3502 (MASK version) NJU3502
*
NJU3552 2.7V
Supply Voltage (VDD) MIN. Supply Current 5V (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max. 3V (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max.
2.4V
*
4.0mA 4.0mA 3.8mA 4.0A 2.0mA 2.0mA 1.8mA 2.0A
30mA 30mA 30mA 20A 20mA 20mA 20mA 20A
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NJU3552
s ELECTRICAL CHARACTERISTICS
SYM BOL VDD IDD1
DC CHARACTERISTICS 1
(VDD=3.6~5.5V, VSS=0V, Ta=-20~75C)
PARAMETER Supply Voltage
CONDITIONS VDD VDD VDD=5V, fOSC=2MHz X'tal Oscillation in Reset VDD VDD=5V, fOSC=2MHz Ceramic Oscillation in Reset VDD VDD=5V, fOSC=2MHz CR Oscillation in Reset VDD VDD=5V, STANDBY Mode VDD VDD=5V, fOSC=4MHz, Operating PA0~PA3, PB0~PB3, PC0~PC3, SDI(O)/PF1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 PA0~PA3, PB0~PB3, PC0~PC3, SDI(O)/PF1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 VDD=5.5V, VIN=5.5V PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET, SCK/CKOUT VDD=5.5V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET VDD=5.5V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, SCK/CKOUT IOH=-100A PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL1=400A PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL2=15mA PB0~PB3 VDD=5.5V, VOH=5.5V PB0~PB3
MIN 3.6
TYP
MAX 5.5 30
UNIT NOTE V mA *3
IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH
30
mA
*3
30 20 30 0.7VDD 0.8VDD VDD-1.0 0 0 0 VDD VDD VDD 0.3VDD 0.2VDD 1.0 10
mA A mA V V V V V V A
*3 *3 *3 *1 *1 *1 *1
Low-level Input Voltage
High-Level Input Current
*1
IIL1 Low-Level Input Current IIL2
-10
A
*1
-100
A
*1
High-Level Output Voltage
VOH
VDD-0.5
V
*2
Low-Level Output Voltage Output Leakage Current Input Capacitance
VOL1 VOL2 IOD
0.5 2.0 10
V V A pF
*2 *2 *2
Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. CIN
10
20
-5-
NJU3552
s ELECTRICAL CHARACTERISTICS
SYM BOL VDD IDD1
DC CHARACTERISTICS 2
(VDD=2.7~3.6V, VSS=0V, Ta=-20~75C)
PARAMETER Supply Voltage
CONDITIONS VDD VDD VDD=3V, fOSC=1MHz X'tal Oscillation in Reset VDD VDD=3V, fOSC=1MHz Ceramic Oscillation in Reset VDD VDD=3V, fOSC=1MHz CR Oscillation in Reset VDD VDD=3V, STANDBY Mode VDD VDD=3V, fOSC=2MHz, Operating PA0~PA3, PB0~PB3, PC0~PC1, SDI(O)/PL1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 PA0~PA3, PB0~PB3, PC0~PC3, SDI(O)/PF1, SCK/CKOUT PD0, PD1, EXTI/PE0, RESET OSC1 VDD=3.6V, VIN=3.6V PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET, SCK/CKOUT VDD=3.6V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, RESET VDD=3.6V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0~PC3, PD0, PD1, EXTI/PE0, SDI(O)/PF1, SCK/CKOUT IOH=-80A PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL1=350A PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1, SCK/CKOUT IOL2=5mA PB0~PB3 VDD=3.6V, VOH=3.6V PB0~PB3
MIN 2.7
TYP
MAX 3.6 20
UNIT NOTE V mA *3
IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH
20
mA
*3
20 20 20 0.8VDD 0.85VDD VDD-0.3 0 0 0 VDD VDD VDD 0.2VDD 0.15VDD 0.3 10
mA A mA V V V V V V A
*3 *3 *3 *1 *1 *1 *1
Low-level Input Voltage
High-Level Input Current
*1
IIL1 Low-Level Input Current IIL2
-10
A
*1
-100
A
*1
High-Level Output Voltage
VOH
VDD-0.5
V
*2
Low-Level Output Voltage Output Leakage Current Input Capacitance
VOL1 VOL2 IOD
0.5 1.0 10
V V A pF
*2 *2 *2
Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. CIN
10
20
-6-
NJU3552
s ELECTRICAL CHARACTERISTICS
SYM BOL
AC CHARACTERISTICS 1
(VSS=0V, Ta= -20~75C)
PARAMETER
CONDITIONS X'tal Resonator Ceramic Resonator External Resistor Oscillation External Clock X'tal Resonator Ceramic Resonator External Resistor Oscillation External Clock
MIN 0.03 0.03 0.03 0.03 0.03 0.03 0.03 0.03
TYP
MAX 2.0 2.0 1.0 2.0 4.0 4.0 2.0 4.0
UNIT
VDD=2.7~3.6V Operating Frequency fOSC VDD=3.6~5.5V
MHz
Instruction Cycle Time External Clock Pulse Width External Clock Rise Time Fall Time RESET Low-Level Width RESET Rise Time Port Input Level Width Edge Detection (PD1) Rise Time Fall Time Restart Signal (PD0) Rise Time External interrupt input (EXTI) Rise Time
tC tCPH tCPL tCPR tCPF tRST tRSR tPIN tEDR tEDF tSTR tEXR VDD=2.7~3.6V VDD=3.6~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V 6/fOSC 4/fOSC 250 125
6/fOSC 16600 16600 20
s ns ns s 20 ms s 200 200 200 ns ns ns
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NJU3552
s AC CHARACTERISTICS 1
EXTERNAL CLOCK OSC1
TIMING CHART
1/fOSC VIH3 VIL3 tCPH tCPF tRST tCPL tRSR VIH2 VIL2 tCPR
RESET INPUT
RESET
PORT INPUT tPIN VIH1, VIH2 PORT VIL1, VIL2 EDGE DETECTOR INPUT tEDR VIH2 VIL2 RESTART SIGNAL INPUT tSTR VIH2 PD0 VIL2 EXTERNAL INTERRUPT tEXR VIH2 EXTI VIL2 tEDF
PD1
-8-
NJU3552
s ELECTRICAL CHARACTERISTICS
SYM BOL fSC
AC CHARACTERISTICS 2
SERIAL INTERFACE
(VSS=0V, VDD=2.7~5.5V, Ta= -20~75C) PARAMETER Serial Operating Frequency Clock Pulse Width Low-Level CONDITIONS Internal Clock External Clock
VDD=2.7~3.6V
MIN
TYP
MAX
UNIT
(1/12)xfOSC* Hz 500k fOSC=2MHz VDD=3.6~5.5V fOSC=4MHz VDD=2.7~3.6V fOSC=2MHz VDD=3.6~5.5V fOSC=4MHz 3.0 1.5 1.0 3.0 1.5 1.0 0.5 0.5 0.5 s s s s s
tSCL
Internal Clock External Clock
Clock Pulse Width High-Level
tSCH
Internal Clock
External Clock SDI setup Time tDS To SCK SDI Hold time tDH To SCK SDO Data t Fix Time To SCK DCD * The dividing ratio of the internal clock is 1/2.
s AC CHARACTERISTICS 2
SERIAL INTERFACE TIMING CHART
1/fSC tSCL tSCH VIH1
SCK VIL1
tDS SDI(O)
tDH VIH1
INPUT DATA VIL1 tDCD VOH
SDO/SDI(O) VOL1
OUTPUT DATA
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NJU3552
s OPTION as same as mask version (NJU3502)
1) INPUT OUTPUT Terminal Selection All of input-output terminals select a terminal type for each port from the following table1 and table2 by the mask option. [ CIRCUIT TYPE TABLE 1 ] TERMINAL TYPES Input / Output Terminal*1 SYMBOL Programmable Input / Output Port of Output Port of Input
EXTRA FUNCTION
REMARKS
PA0 PA1 PA2 PA3 PB0 PB1 PB2 PB3 PC0
ICP IC ICP IC ICP IC ICP IC
OC OC OC OC IOP IO IOP IO IOP IO IOP IO
ICP OC IC PC1 ICP OC IC PC2 ICP OC IC PC3 ICP OC IC Note) The symbol in the above table is the same as in mask option generator software. *1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT TERMINAL TYPE.
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NJU3552
[ CIRCUIT TYPE TABLE 2 ] TERMINAL TYPES Input / Output Terminal*1 SYMBOL Programmable Input / Output Port of Output Port of Input
EXTRA FUNCTION
REMARKS
PD0 PD1 EXTI / PE0 *2 SDO / PF0 SDI(O) / PF1 *2 SCK / CKOUT *2 *3
ISP IS ISP IS ISP IS ICP IC
OC OC IIP II SO SDP SD SCP SC -
Restart signal input Edge detection External interrupt input (EXTI) Serial data output Serial data input/output Serial clock input/output R F Rise edge detection Fall edge detection
OC OC
MSB MSB first LSB LSB first
Output clock divide by pre-scaler Note) The symbol in the above table is the same as in mask option generator software. *1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT TERMINAL TYPE. *2) The pull-up resistance is added to the terminal selected as the extra function. *3) When Serial INPUT-OUTPUT is selected, "SCK" is selected automatically. When it is not selected, "CKOUT" is selected automatically.
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NJU3552
[MASK OPTION LIST] SYM BOL ICP ISP IC IS OC IIP II SDP SD SO SCP SC IOP IO R F FUNCTION C-MOS input with pull-up resistance C-MOS Schmitt trigger input with pull-up resistance C-MOS input C-MOS Schmitt trigger input C-MOS output External interrupt input with pull-up resistance External interrupt input Serial data input/output with pull-up resistance Serial data input/output Serial data output Serial clock input/output with pull-up resistance Serial clock input/output Programmable input/output with pull-up resistance Programmable input/output Rise edge detection Fall edge detection SYM BOL MSB LSB 1 2 3 4 5 6 7 8 9 a b c FUNCTION Serial data order MSB first Serial data order LSB first 1/2 1/4 1/8 1/16 1/32 1/64 1/128 1/256 1/512 1/1024 1/2048 1/4096
- 12 -
NJU3552
[ INPUT OUTPUT TERMINAL TYPE ] Types With Pull-up Type ICP Without Pull-up Type IC Terminals PA0~PA3, PC0~PC3, SDI(O)/PF1
C-MOS INPUT TERMINAL
Type ISP SCHMITT TRIGGER
Type IS
PD0, PD1, EXTI/PE0
Type ON
C-MOS OUTPUT TERMINAL
PA0~PA3, PC0~PC3, PD0, PD1, SDO/PF0, SDI(O)/PF1
Type ONP N-channel(Nch) OPEN DRAIN
Type ON
PROGRAMMABLE INPUT OUTPUT TERMINAL
Type IOP
Type IO
PB0~PB3
C-MOS INPUT / Nch OPEN DRAIN OUTPUT
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NJU3552
2) Edge Detector Selection PD1 terminal is added the "Edge detect function" by the mask option. Rising edge Falling edge
3) The data order (MSB, LSB) of the Serial Interface The data order of the Serial Interface is selected select either MSB or LSB first by the mask option.
4) Dividing ration of the internal clock Each dividing ration of the count clocks of Timer, the Internal shift clock of the Serial Interface and the output clock through the SCK/CKOUT terminal is selected among the following by the mask option. The frequency of each clock is determined by the dividing ration and the 1-instruction term (1/fOSCx6). 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512, 1/1024, 1/2048, 1/4096 Note) As the shift clock of the serial interface, the external clock or the internal is selected by the program.
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
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