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| WIRELESS COMMUNICATIONS DIVISION TQ5122 DATA SHEET GND 1 GND Vdd MXR 2 3 16 15 14 13 12 11 10 9 GND GND IF Output/Vdd GND MXR RF Input GND LNA Out Sleep Control MXR LO 4 VDD LNA GND RF IN GND 5 6 7 8 3V Cellular TDMA/AMPS Receiver IC With PowerDown Features Power-Down, "Sleep" Mode Single 2.8V operation Low-current operation Small QSOP-16 plastic package Few external components Product Description The TQ5122 is a 3V, RF receiver IC designed specifically for Cellular band TDMA applications. It's RF performance meets the requirements for products designed to the IS-136 TDMA and the AMPS standards. The TQ5122 includes a power-down mode which allows current saving during standby and the non-operating portion of the TDMA pulse. The TQ5122 contains LNA and Mixer circuits matched to the 800MHz cellular band. The mixer uses a high-side LO frequency. The IF has a usable frequency range of 85 to 150MHz. The LNA Output and Mixer Input ports are internally matched to simplify the design and keep the number of external components to a minimum. The TQ5122 achieves excellent RF performance with low current consumption which yields long standby times in portable applications. The small QSOP-16 package is ideally suited for Cellular band mobile phones. Electrical Specifications1 Parameter Frequency Gain Noise Figure Input 3rd Order Intercept Min 869 18.5 2.7 -8.5 12.0 Typ Max 894 Units MHz dB dB dBm mA Applications IS-136 TDMA Mobile Phones Dual Mode TDMA/AMPS Mobile Phones AMPS Mobile Phones DC supply Current Note 1: Test Conditions: Vdd=2.8VDC, Tc=25C, Filter IL=2.5dB, RF=881MHz, LO=1016MHz, IF=135MHz, LO input=-7dBm For additional information and latest specifications, see our website: www.triquint.com 1 TQ5122 Data Sheet Electrical Characteristics1,2 Parameter RF Frequency LO Frequency IF Frequency LO input level Supply voltage Gain Gain Variation vs. Temp. Noise Figure Input 3rd Order Intercept LNA input - with external match LNA output Mixer RF input Mixer LO input Isolation LO to LNA RF in LO to IF; after IF match RF to IF; after IF match IF Output Impedance Vdd = 2.8V; Sleep mode, Device On Vdd = 2.8V; Sleep mode, Device Off Vdd = 0V Power Down, "sleep" Device On Voltage Device Off Voltage Supply Current, Sleep mode, Device On Supply Current, Sleep mode, Device Off Operating Temperature, case Tc = + 25 C Enable voltage = 0, LO Drive off -40 0 -11.0 10 10 10 10 35 40 20 500 Approx. Open <50 Vdd 0 12 100 25 15 1000 +85 Vdd -40 to 85 C 2.7 -8.5 Conditions Min. 869 954 85 -7 2.7 16.0 -4 2.8 18.5 +/-2.0 3.5 Typ/Nom Max. 894 1044 150 0 4.0 Units MHz MHz MHz dBm V dB dB dB dBm dB dB dB dB dB dB dB Ohm Ohm Ohm VDC VDC mA A C Return Loss Note 1: Test Conditions: Vdd=2.8VDC, Filter IL=2.5dB, RF=881MHz, LO=1016MHz, IF=135MHz, LO input=-7dBm, TC = 25C, unless otherwise specified. Note 2: Min./Max. limits are at +25C case temperature unless otherwise specified. Absolute Maximum Ratings Parameter DC Power Supply Power Dissipation Operating Temperature Storage Temperature Signal level on inputs/outputs Voltage to any non supply pin Value 5.0 500 -55 to 100 -60 to 150 +20 -0.3 to Vdd + 0.3 Units V mW C C dBm V 2 For additional information and latest specifications, see our website: www.triquint.com TQ5122 Data Sheet Typical Performance Test Conditions (Unless Otherwise Specified): Vdd=2.8VDC, Tc=25C, filter IL=2.5dB, RF=881MHz, LO=1016MHz, IF=135MHz, LO input=-7dBm Gain vs. Frequency vs. Temperature 25 20 Gain (dB) 15 10 -40C 5 0 869 872 875 878 881 884 887 890 893 Frequency (MHz) +25C +85C 0 2.7 2.8 Gain (dB) 25 20 15 10 5 Gain vs. Vdd vs. Temperature +85C +25C -40C 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 Vdd (volts) Input IP3 vs. Frequency vs. Temperature Input IP3 vs. Vdd vs. Temperature -4 -6 Input IP3 (dBm) -8 -10 -12 -14 -16 +85C +25C -40C -4 -6 Input IP3 (dBm) -8 -10 -12 85C -14 -16 -18 869 872 875 25C -40C 878 881 884 887 Frequency (MHz) 890 893 2.7 2.8 2.9 3 3.1 3.2 3.3 Vdd (volts) 3.4 3.5 3.6 NF vs. Frequency vs. Temperature 4 4 3.5 3 NF (dB) NF (dB) 3 2.5 2 1.5 1 0.5 0 869 872 875 878 881 884 Frequency (MHz) 887 890 893 2.7 2.8 NF vs. Vdd vs. Temperature 2 +85C +25C -40C 1 +85C +25C -40C 2.9 3 3.1 3.2 Vdd (volts) 3.3 3.4 3.5 3.6 0 For additional information and latest specifications, see our website: www.triquint.com 3 TQ5122 Data Sheet Application/Test Circuit 1 16 2 15 C5 V IF C3 V MX L2 LO in 4 13 3 14 L3 C4 IF out C6 V LNA C2 5 12 6 11 F881 L1 LNA in C1 8 9 7 10 Sleep Control Bill of Material for TQ5122 Receiver Application/Test Circuit* Component Receiver IC Capacitor Capacitor Capacitor Capacitor Capacitor Inductor Inductor Inductor Toyocom (select) Reference Designator U1 C1 C2, C3 C4 C5 C6 L1 L2 L3 F1 T726881A Part Number TQ5122 2.7pF 22pF 10pF 1000pF 8.2 pF 22nH 12nH 150nH 627-881A Value Size QSOP-16 0603 0603 0603 0603 0603 0603 0603 0805 Toyocom Manufacturer TriQuint Semiconductor * May vary due to printed circuit board layout and material. 4 For additional information and latest specifications, see our website: www.triquint.com TQ5122 Data Sheet TQ5122 Product Description The TQ5122 3V RFIC Downconverter is designed specifically for cellular band TDMA/AMPS applications. The TQ5122 contains LNA, Mixer and LO buffer circuits matched to the 800 MHz cellular frequency band. The IF frequency may be selected between 85 and 150 MHz. Most RF ports are internally matched to 50 simplifying the design and minimizing the number of external components. The TQ5122 also includes a power-down mode switch which allows current saving during standby and the non-operating portion of the TDMA pulse. presented to the input pin. Highest gain and lowest return loss occur when s is equal to the complex conjugate of the LNA input impedance. A different source reflection coefficient, opt, which is experimentally determined, will provide the lowest noise figure, Fmin. The noise resistance, Rn, provides an indication of the sensitivity of the noise performance to changes in s as seen by the LNA input. FLNA = FMIN + opt - S 4 RN Z 0 1 + opt 2 1 - s 2 2 ( ) Operation Please refer to the test circuit above. Low Noise Amplifier (LNA) The LNA section of the TQ5122 are cascaded common source FET's, see Figure 1. It is designed to operate on DC supply voltages from 2.7V to 5V. The source terminal must be grounded as close as possible to Pin 8 to avoid significant gain reduction due to degeneration. The LNA requires an input matching circuit to obtain best noise figure, gain and return loss. The LNA output is close to 50 for direct connection to a 50 image reject filter. Components such as filters and mixers placed after the LNA degrade the overall system noise figure according to the following equation: FSYSTEM = FLNA + F2 - 1 GLNA FLNA and GLNA represent the linear noise factor and gain of the LNA and F2 is the noise factor of the next stage. The system noise figure is a compromise between the highest gain and minimum noise figure of the LNA. See Table 1 for noise parameters. Table 1. TQ5122 Noise Parameters Vdd LOAD LNA out LNA in BIAS BIAS Freq. MHz 830 880 930 |Gopt| 0.88 0.83 0.82 / Gopt 34.5 37.8 40.0 Fmin 0.75 0.89 0.97 Rn 51.2 50.4 50.0 LNA Output Match The output impedance of the LNA was designed for 50. The internal 50 match eliminates the need for external components at this port. It also improves IP3 performance and power gain. The output of the LNA is intended to be connected directly to an image reject filter. Depending on the filter, additional components may be needed to better match to the LNA output. Some image reject filters may require a series inductor to smooth the frequency response and improve overall performance. Figure 1. Simplified Schematic of LNA Section LNA Input Match The designer can make some Noise Figure and Gain trade off by varying the off chip LNA input matching circuit values and topology. This allows the TQ5122 to be optimized for specific system requirements. The LNA gain, noise figure and input return loss are a function of the source impedance (Zs), or reflection coefficient (s), For additional information and latest specifications, see our website: www.triquint.com 5 TQ5122 Data Sheet Mixer The mixer of the TQ5122 uses a common source depletion mode MESFET. The mixer is designed to operate on supply voltages from 2.7V to 5V. A 50 matched on-chip buffer amplifier allows direct connection of the LO input to commercially available VCO's with output drive levels down to -7dBm. The common-gate LO buffer provides good input match and supplies the voltage gain needed to drive the mixer FET. The mixer also has an "open-drain" IF output which provides flexibility in matching to various IF frequencies and filter impedances, see Figure 2. Open Drain IF Output degradation in conversion gain and system noise figure. Sensitivity to the phenomena depends on the particular filter model and the line length between the mixer input pin and the filter. In some cases a small inductance can be added between the filter and the mixer input to compensate. With some line lengths and filter combinations, no inductor is necessary. LO Buffer & Calculation of Nominal L2 Value The node between the LO buffer amplifier and the mixer FET is brought out to Pin 3 (V MX) and connected by an inductor to AC ground. This inductor is selected to resonate with internal on chip capacitance at the LO frequency in order to reduce out-ofband gain and improve noise performance. LO Bias and Tuning Mixer RF Input The internal capacitance of the LO amplifier output plus the stray capacitance on the board surrounding Pin 3 is approximately 1.5 pF. The inductor is selected to resonate with the total capacitance at the LO frequency using the following equation: LO Input Figure 2, Mixer Section L= 1 C(2f ) 2 , where C = 1.5 pF LO Input Port The LO input port is matched to 50. This allows the TQ5122 to operate at low LO drivel levels. However, the values and positions of L2 and C3 shown in the applications circuit effect the gain of the LO buffer amplifier and are important to the proper operation of the TQ5122. See "Calculation of nominal L2 Value" below The common gate buffer amplifier provides the voltage gain needed to drive the gate of the mixer FET while using very little current (approximately 1.5mA). Because of the 50 input match of the buffer amplifier and the internal DC blocking capacitor, the system VCO output can be directly connected to the TQ5122 LO input via a 50 The final values must be confirmed with measurements on a board approximating the final layout. The final layout will affect the value and position of L2 and its bypass capacitor, C3, see Figure 5. Network Analyzer Port 1 Port 2 3 4 TQ5122 Probe -30 -32 S21 (dB) -34 -36 -38 -40 -42 transmission line with no additional components. Mixer Input Although the mixer input port is matched to 50, TriQuint has found that LO leakage through the Mixer RF input pin, can in some cases, reflect off the SAW image reject filter and return back to the mixer out of phase. This may cause some 700 800 900 1000 1100 1200 Frequency (MHz) Figure 3. LO Buffer Frequency Response 6 For additional information and latest specifications, see our website: www.triquint.com TQ5122 Data Sheet Measuring the LO Frequency Response The frequency response of the LO driver amplifier can be measured using a semi-rigid probe, see Figure 3, and a network analyzer. Connect port 1 to the LO input (Pin 4) of the TQ5122 with the source power set to deliver -7 dBm. Connect the coaxial probe to Port 2 and place the probe tip approximately 0.1 inch away from either Pin 3 or the inductor. If the calculated shunt inductor (L2) is not a standard value, the AC ground bypass capacitor C3 can be positioned along the transmission line to adjust for the right inductance, see Figure 4. Once this is completed, the peak of the response should be centered at the center of the LO frequency band. Placement of C3 will adjust between standard values of inductors. topology must contain either an RF choke or shunt inductor. An extra DC blocking capacitor is not necessary if the output will be attached directly to a SAW or crystal bandpass filters. Figure 5 illustrates a shunt L, series C, shunt C IF matching network. It is one of the simplest matching networks and requires the fewest components. DC current can be easily injected through the shunt inductor and the series C provides a DC block, if needed. The shunt C, is used to reduce the LO leakage. 10 pF Pin 14 150nH Pin 13 1000pF V IF IF out 8.2pF GND C3 Figure 5, IF Output Match, 135 MHz Pin 2 Power down, "sleep" mode Pin 3 L2 Figure 4, Adjusting the AC Ground The power down circuit is used to reduce average power consumption in TDMA applications by toggling the receiver on and off within the receive time slot when no signal is present. Mixer IF Port The Mixer IF output is an "open-drain" configuration, allowing for flexibility in efficient matching to various filter types and at various IF frequencies. For evaluation of the LNA and mixer, it is usually necessary to impedance match the IF port to the 50 test systems. When verifying or adjusting the matching circuit on the prototype circuit board, the LO drive should be injected at pin 4 at the nominal power level of -4 dBm, since the LO level does have an impact on the IF port impedance. There are several networks that can be used to properly match the IF port to the SAW or crystal IF filter. The mixer supply voltage is applied through the IF port, so the matching circuit The power down circuitry operates through the incorporation of enhancement-mode FET switches in all DC paths. Level shifting circuitry is incorporated for the purpose of providing an interface compatible with CMOS logic levels. The entire chip nominally draws 100uA when the power-down pin is at 0V. When the power-down pin is at 2.8V (Vdd), the chip draws nominal specified current. The power-down pin itself, Pin 9, draws approximately 40uA when 2.8V is applied. Less than 1uA is sourced from the power-down pin when 0V is applied. For additional information and latest specifications, see our website: www.triquint.com 7 TQ5122 Data Sheet Package Pinout GND 1 GND Vdd MXR 2 3 16 15 14 13 12 11 10 9 GND GND IF Output/Vdd GND MXR RF Input GND LNA Out Sleep Control MXR LO 4 VDD LNA GND RF IN GND 5 6 7 8 Pin Descriptions Pin Name GND GND VDD_MXR MXR LO IN VDD LNA GND LNA IN GND, LNA SLEEP LNA OUT GND MXR_RF GND IF OUT GND GND Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description and Usage Ground Ground Mixer LO buffer supply voltage. Series inductor required for LO buffer tuning. Local external bypass capacitor required. Mixer LO input. DC blocked, matched to 50 LNA DC supply voltage. Local external bypass capacitor required. Ground LNA RF input. DC blocked. Requires external matching elements for noise match and match to 50 LNA first stage ground connection. Direct connection to ground required. Power-Down mode control. LNA RF output. DC blocked. Matched to 50. Ground Mixer RF input, DC blocked. Matched to 50. Ground IF output. Open drain output, connection to Vdd required. External matching is required. Ground Ground For ground pins 1, 2, 6, 11, 13, 15, and 16, TriQuint recommends use of several via holes to the backside ground immediately adjacent to the pin. 8 For additional information and latest specifications, see our website: www.triquint.com TQ5122 Data Sheet Package Type: Power QSOP-16 Plastic Package D NOTE A E E1 b A e A1 c L NOTE B DESIGNATION A A1 b c D e E E1 L NOTES: A. DESCRIPTION OVERALL HEIGHT STANDOFF LEAD WIDTH LEAD THICKNESS PACKAGE LENGTH LEAD PITCH LEAD TIP SPAN PACKAGE WIDTH FOOT LENGTH FOOT ANGLE ENGLISH 0.064 +/-.005 in 0.007 +/-.003 in 0.010 +/-.002 in 0.085 +/-.015 in 0.193 +/-.004 in 0.025 BSC 0.236 +/-.008 in 0.154 +/-.003 in 0.033 +/-.017 in 4 +/-4 DEG METRIC 1.63 +/-.13 mm 0.18 +/-.08 mm 0.25 +/-.05 mm 2.16 +/-.38 mm 4.90 +/-.10 mm 0.635 BSC 5.99 +/-.20 mm 3.91 +/-.08 mm 0.84 +/-.43 mm 4 +/-4 DEG NOTE C C C C A, C C B, C C The D dimension does not include mold flashing and mismatch. Mold flashing and mismatch shall not exceed .006 in (.15 mm) per side. The E1 dimension does not include mold flashing and mismatch. Mold flashing and mismatch shall not exceed .010 in (.25 mm) per side. B. C. Primary units are English inches. The metric equivalents are subject to rounding error. Additional Information For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: info_wireless@tqs.com Tel: (503) 615-9000 Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: info_wireless@tqs.com The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright (c) 1999 TriQuint Semiconductor, Inc. All rights reserved. Revision D, August 19, 1999 For additional information and latest specifications, see our website: www.triquint.com 9 |
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