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(R)
CMOS STATIC RAM 64K (16K x 4-BIT) with Output Control
IDT6198S IDT6198L
Integrated Device Technology, Inc.
FEATURES:
* High-speed (equal access and cycle times) -- Military: 20/25/35/45/55/70/85ns (max.) -- Commercial: 15/20/25/35ns (max.) * Output Enable (OE) pin available for added system flexibility * Low-power consumption * JEDEC compatible pinout * Battery back-up operation--2V data retention (L version only) * 24-pin CERDIP, high-density 28-pin leadless chip carrier, and 24-pin SOJ * Produced with advanced CMOS technology * Bidirectional data inputs and outputs * Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT6198 is a 65,536-bit high-speed static RAM organized as 16K x 4. It is fabricated using IDT's high-performance, high-reliability technology--CMOS. This state-of-theart technology, combined with innovative circuit design tech-
niques, provides a cost-effective approach for memory intensive applications. Timing parameters have been specified to meet the speed demands of the IDT79R3000 RISC processors. Access times as fast as 15ns are available. The IDT6198 offers a reduced power standby mode, ISB1, which is activated when CS goes HIGH. This capability significantly decreases system, while enhancing system reliability. The low-power version (L) also offers a battery backup data retention capability where the circuit typically consumes only 30W when operating from a 2V battery. All inputs and outputs are TTL-compatible and operate from a single 5V supply. The IDT6198 is packaged in either a 24-pin 300 mil CERDIP, 28-pin leadless chip carrier or 24-pin J-bend small outline IC. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
A0 VCC GND 65,536-BIT MEMORY ARRAY
DECODER
A13
I/O0 I/O1 I/O2 I/O3
COLUMN I/O INPUT DATA CONTROL
CS WE OE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2987 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1994 Integrated Device Technology, Inc.
MAY 1994
6.3
DSC-1010/4
1
IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
A0 A1 A2 A3 A4 A5 A6 A7 A8
1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13
TRUTH TABLE(1)
VCC A13 A12 A11 A10 A9 NC I/O 3 I/O 2 I/O 1 I/O 0
Mode Standby Read Write Read
CS
H L L L
WE
X H L H
OE
X L X H
I/O High-Z DATAOUT DATAIN High-Z
Power Standby Active Active Active
2987 tbl 02
D24-1 & SO24-4
NOTE: 1. H = VIH, L = VIL, X = Don't Care
GND
CS OE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM Rating Com'l. Mil. -0.5 to +7.0 Unit V Terminal Voltage -0.5 to +7.0 with Respect to GND Operating Temperature Temperature Under Bias Storage Temperature Power Dissipation DC Output Current 0 to +70 -55 to +125 -55 to +125 1.0 50
WE
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DIP/SOJ TOP VIEW TA
A0 NC NC VCC NC
INDEX
-55 to +125 -65 to +135 -65 to +150 1.0 50
C C C W mA
TBIAS TSTG PT IOUT
3
2
A1 A2 A3 A4 A5 A6 A7 A8 CS
4 5 6 7 8 9 10 11
1
28 27 26 25 24 23
L28-2
22 21 20 19
18 12 13 14 15 16 17
NC A13 A12 A11 A10 A9 I/O3 I/O2 I/O1
2987 drw 03
OE GND NC WE I/O0
NOTE: 2987 tbl 03 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
LCC TOP VIEW
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol CIN Parameter(1) Input Capacitance I/O Capacitance Conditions VIN = 0V VOUT = 0V Max. 7 7 Unit pF pF
PIN DESCRIPTIONS
Name A0-A13 Description Address Inputs Chip Select Write Enable Output Enable Data Input/Output Power Ground
2987 tbl 01
CI/O
NOTE: 2987 tbl 04 1. This parameter is determined by device characterization, but is not production tested.
CS WE OE
I/O0-I/O3 VCC GND
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IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
RECOMMENDED DC OPERATING CONDITIONS
Symbol VCC GND VIH VIL Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5
(1)
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Max. Unit 5.5 0 6.0 0.8 V V V V Grade Military Commercial Temperature -55C to +125C 0C to +70C GND 0V 0V VCC 5V 10% 5V 10%
2987 tbl 06
Typ. 5.0 0 -- --
NOTE: 2987 tbl 05 1. VIL (min.) = -3.0V for pulse width less than 20ns, once per cycle.
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V 10%
IDT6198S Symbol |ILI| |ILO| VOL Parameter Input Leakage Current Output Leakage Current Output Low Voltage Test Condition VCC = Max., VIN = GND to VCC VCC = Max., CS = VIH, VOUT = GND to VCC IOL = 10mA, VCC = Min. IOL = 8mA, VCC = Min. VOH Output High Voltage IOH = -4mA, VCC = Min. -- 2.4 MIL. COM'L. MIL. COM'L. Min. -- -- -- -- Max. 10 5 10 5 0.5 0.4 -- IDT6198L Min. -- -- -- -- -- -- 2.4 Max. 5 2 5 2 0.5 0.4 -- V
2987 tbl 07
Unit A A V
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5V 10%, VLC = 0.2V, VHC = VCC - 0.2V)
6198S15 6198L15 Symbol ICC1 Parameter Operating Power Supply Current CS = VIL, Outputs Open VCC = Max., f = 0(2) Dynamic Operating Current CS = VIL, Outputs Open VCC = Max., f = fMAX(2) Standby Power Supply Current (TTL Level) CS VIH, VCC = Max., Outputs Open, f = fMAX(2) Full Standby Power Supply Current (CMOS Level) CS VHC, VCC=Max., VIN VHC or VIN VLC, f = 0(2) 6198S20 6198L20 6198S25 6198L25
Mil.
6198S35 6198L35
6198S45 6198L45
Mil.
6198S55/70/85 6198L55/70/85
Com'l. Mil.
Power Com'l. Mil. Com'l. Mil. Com'l. S L S L S L S L 100 75 135 125 60 45 20 1.5 -- -- -- -- -- -- -- -- 100 70 130 115 55 40 15 0.5 105 80 160 130 70 50 25 1.5 100 70 125 105 50 35 15 0.5
Com'l. Mil. Com'l.
Unit mA
105 80 155 120 60 40 20 1.5
100 70 125 105 45 30 15 0.5
105 80 140 115 50 35 20 1.5
-- -- -- -- -- -- -- --
105 80 140 110 50 35 20 1.5
-- -- -- -- -- -- -- --
105 80 140 110 50 35 20 1.5
ICC2
mA
ISB
mA
ISB1
mA
NOTES: 1. All values are maximum guaranteed values. 2. At f = fMAX address and data inputs are cycling at the maximum frequency of read cycles of 1/tRC. f = 0 means no input lines change.
2987 tbl 06
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IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(L Version Only) VLC = 0.2V, VHC = VCC - 0.2V
Typ. (1) VCC @ Symbol VDR ICCDR tCDR(3) tR(3) |ILI|
(3)
Max. VCC @ 2.0V -- 600 150 -- -- 2 3.0V -- 900 225 -- -- 2 Unit V A ns ns A
2987 tbl 09
Parameter VCC for Data Retention Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time Input Leakage Current
Test Condition -- MIL. COM'L.
Min. 2.0 -- -- 0 tRC(2) --
2.0v -- 10 10 -- -- --
3.0V -- 15 15 -- -- --
CS VHC
VIN VHC or VLC
NOTES: 1. TA = +25C. 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization but is not production tested.
LOW VCC DATA RETENTION WAVEFORM
DATA RETENTION MODE VCC 4.5V tCDR VDR 2V 4.5V tR VIH VDR
2987 drw 04
CS
VIH
AC TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load GND to 3.0V 5ns 1.5V 1.5V See Figures 1 and 2
2987 tbl 10
5V 480 DATAOUT 255 30pF*
5V 480 DATAOUT 255 5pF*
2987 drw 05
2987 drw 06
Figure 1. AC Test Load *Includes scope and jig capacitances
Figure 2. AC Test Load (for tOLZ, tCLZ, tOHZ, tWHZ, tCHZ and tOW)
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IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V 10%, All Temperature Ranges)
6198S15(1) 6198L15(1) 6198S20 6198L20 6198S25 6198L25 6198S35 6198L35 6198S45/55(2) 6198S70/85(2) 6198L45/55(2) 6198L70/85(2)
Symbol Read Cycle tRC tAA tACS tCLZ tOE tOLZ
(3) (3) (3) (3)
Parameter
Min. Max. Min. Max. Min.
Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low-Z Output Enable to Output Valid Output Enable to Output in Low-Z Chip Select to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change Chip Select to Power Up Time Chip Deselect to Power Down Time
15 -- -- 5 -- 5 2 2 5 0 --
-- 15 15 -- 8 -- 7 7 -- -- 15
20 -- -- 5 -- 5 2 2 5 0 --
-- 19 20 -- 9 -- 8 8 -- -- 20
25 -- -- 5 -- 5 2 2 2 0 --
-- 25 25 -- 11 -- 10 9 -- -- 25
35 -- -- 5 -- 5 2 2 5 0 --
-- 35 35 -- 18 -- 14 15 -- -- 35
45/55 -- -- 5 -- 5 -- -- 5 0 --
-- 45/55 45/55 -- 25/35 -- 15/20 15/20 -- -- 45/55
70/85 -- -- 5 -- 5 -- -- 5 0 --
-- 70/85 70/85 -- 45/55 -- 25/30 25/30 -- -- 70/85
ns ns ns ns ns ns ns ns ns ns ns
tCHZ
tOHZ tOH tPU tPD
(3) (3)
NOTES: 1. 0 to +70C temperature range only. 2. -55C to +125C temperature range only. 3. This parameter is guaranteed by device characterization but is not production tested.
2987 tbl 11
TIMING WAVEFORM OF READ CYCLE NO. 1(1)
tRC ADDRESS tAA tOH
OE
tOE
CS
tOLZ
(5)
tOHZ (5)
tACS tCLZ (5) DATAOUT DATA VALID
tCHZ (5)
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NOTES: 1. WE is HIGH for Read cycle. 2. Device is continuously selected, CS is LOW. 3. Address valid prior to or coincident with CS transition LOW. 4. OE is LOW. 5. Transition is measured 200mV from steady state voltage.
6.3
5
IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 2(1, 2, 4)
tRC ADDRESS tAA tOH DATAOUT PREVIOUS DATA VALID DATA VALID
2987 drw 08
tOH
TIMING WAVEFORM OF READ CYCLE NO. 3(1, 3, 4)
CS
tACS tCLZ (5) DATAOUT tPU ICC VCC SUPPLY CURRENT ISB
2987 drw 09
tCHZ DATA VALID
(5)
tPD
NOTES: 1. WE is HIGH for Read cycle. 2. Device is continuously selected, CS is LOW. 3. Address valid prior to or coincident with CS transition LOW. 4. OE is LOW. 5. Transition is measured 200mV from steady state voltage.
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V 10%, All Temperature Ranges)
6198S15(1) 6198L15(1) 6198S20 6198L20 6198S25 6198L25 6198S35 6198L35 6198S45/55(2) 6198S70/85(2) 6198L45/55(2) 6198L70/85(2)
Symbol Write Cycle tWC tCW tAW tAS tWP tWR tWHZ tDW tDH tOW
(3) (3)
Parameter
Min. Max. Min. Max. Min.
Max. Min. Max. Min. Max. Min. Max. Unit
Write Cycle Time Chip Select to End-of-Write Address Valid to End-of-Write Address Set-up Time Write Pulse Width Write Recovery Time Write Enable to Output in High-Z Data Valid to End-of-Write Data Hold Time Output Active from End-of-Write
14 14 14 0 14 0 -- 10 0 5
-- -- -- -- -- -- 5 -- -- --
17 17 17 0 17 0 -- 10 0 5
-- -- -- -- -- -- 6 -- -- --
20 20 20 0 20 0 -- 13 0 5
-- -- -- -- -- -- 7 -- -- --
30 25 25 0 25 0 -- 15 0 5
-- -- -- -- -- -- 10 -- -- --
40/50 35/50 35/50 0 35/50 0 -- 20/25 0 5
-- -- -- -- -- -- 15/25 -- -- --
60/75 60/75 60/75 0 60/75 0 -- 30/35 0 5
-- -- -- -- -- -- 30/40 -- -- --
ns ns ns ns ns ns ns ns ns ns
2987 tbl 12
NOTES: 1. 0 to +70C temperature range only. 2. -55C to +125C temperature range only. 3. This parameter is guaranteed by device characterization, but is not production tested.
6.3
6
IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED TIMING)(1, 2, 3, 7) WE
tWC ADDRESS
OE
tAW
CS
tAS tWP tWR
WE
tWZ (6) DATAOUT
(4)
tOW (6)
(4)
tDW DATAIN
tDH
DATA VALID
2987 drw 10
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS CONTROLLED TIMING)(1, 2, 3) CS
tWC ADDRESS tAW
CS
tAS tCW tWR
WE
tDW DATAIN DATA VALID
2987 drw 11
tDH
NOTES: 1. WE or CS must be HIGH during all address transitions. 2. A write occurs during the overlap ( tWP) of a LOW CS and a LOW WE. 3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle. 4. During this period, I/O pins are in the output state so that the input signals must not be applied. 5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state. 6. Transition is measured 200mV from steady state. 7. If OE is LOW during a WE controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse can be as short as the specified tWP.
6.3
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IDT6198S/L CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT6198 Device Type X Power XX Speed X Package X Process/ Temperature Range Blank B Commercial (0C to +70C) Military (-55C to +125C) Compliant to MIL-STD-883, Class B 300 mil CERDIP (D24-1) Leadless Chip Carrier (L28-2) Small Outline IC J-Bend (SO24-4) Commercial Only
D L Y 15 20 25 35 45 55 70 85 S L
Military Only Military Only Military Only Military Only Standard Power Low Power
Speed in nanoseconds
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