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| (R) STB80NF55-06 N - CHANNEL 55V - 0.005 - 80A TO-262/TO-263 STripFETTM POWER MOSFET PRELIMINARY DATA TYPE STB80NF55-06 s s s s V DSS 55 V R DS( on) < 0.0065 ID 80 A s s TYPICAL RDS(on) = 0.005 EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION THROUGH-HOLE I2PAK (TO-262) POWER PACKAGE IN TUBE (SUFFIX "-1")\ SURFACE-MOUNTING D2PAK (TO-263) POWER PACKAGE IN TUBE (NO SUFFIX) OR IN TAPE & REEL (SUFFIX "T4") 3 12 3 1 DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-DC CONVERTERS s AUTOMOTIVE ENVIRONMENT ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS ID ID I DM (*) P tot dv/dt Ts tg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature o o o I2PAK TO-262 (suffix "-1") D2PAK TO-263 (suffix "T4") INTERNAL SCHEMATIC DIAGRAM Value 55 55 20 80 57 320 210 1.43 7 -65 to 175 175 ( 1) ISD 80 A, di/dt 300 A/s, VDD V(BR)DSS, Tj TJMAX Un it V V V A A A W W /o C V/ns o o C C 1/7 (*) Pulse width limited by safe operating area October 1999 STB80NF55-06 THERMAL DATA R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose 0.7 62.5 0.5 300 C/W oC/W o C/W o C o AVALANCHE CHARACTERISTICS Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 30 V) Max Value 80 650 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 55 1 10 100 Typ. Max. Unit V A A nA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 20 V T c = 125 oC ON () Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10V Test Con ditions ID = 250 A ID = 40 A 80 Min. 2 Typ. 3 0.005 Max. 4 0.0065 Unit V A V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D =40 A V GS = 0 Min. Typ. 50 8000 1100 220 Max. Unit S pF pF pF 2/7 STB80NF55-06 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 27 V I D = 40 A R G = 4.7 V GS = 10 V (Resistive Load, see fig. 3) V DD = 44 V I D = 80 A VGS = 10 V Min. Typ. 35 240 178 29 61 230 Max. Unit ns ns nC nC nC SWITCHING OFF Symbo l t d(of f) tf t d(of f) tr (Voff) tf tc Parameter Turn-off Delay T ime Fall T ime Turn-off Delay T ime Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions VDD = 27 V I D = 40 A V GS = 10 V R G =4.7 (Resistive Load, see fig. 3) V DD = 44 V I D = 80 A V GS = 10 V R G = 4.7 (Induct ive Load, see fig. 5) Min. Typ. 260 80 225 55 145 205 Max. Unit ns ns ns ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 80 A V GS = 0 80 0.24 6 I SD = 80 A di/dt = 100 A/s T J = 150 o C V DD = 20 V (see test circuit, fig. 5) Test Con ditions Min. Typ. Max. 80 320 1.5 Unit A A V ns C A () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area 3/7 STB80NF55-06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/7 STB80NF55-06 TO-262 (I2PAK) MECHANICAL DATA mm MIN. A A1 B B2 C C2 D e E L L1 L2 4.4 2.49 0.7 1.14 0.45 1.23 8.95 2.4 10 13.1 3.48 1.27 TYP. MAX. 4.6 2.69 0.93 1.7 0.6 1.36 9.35 2.7 10.4 13.6 3.78 1.4 MIN. 0.173 0.098 0.027 0.044 0.017 0.048 0.352 0.094 0.393 0.515 0.137 0.050 inch TYP. MAX. 0.181 0.106 0.036 0.067 0.023 0.053 0.368 0.106 0.409 0.531 0.149 0.055 DIM. A C2 B2 B E L1 L2 D L P011P5/E 5/7 e A1 C STB80NF55-06 TO-263 (D2PAK) MECHANICAL DATA mm MIN. A A1 B B2 C C2 D E G L L2 L3 4.4 2.49 0.7 1.14 0.45 1.21 8.95 10 4.88 15 1.27 1.4 TYP. MAX. 4.6 2.69 0.93 1.7 0.6 1.36 9.35 10.4 5.28 15.85 1.4 1.75 MIN. 0.173 0.098 0.027 0.044 0.017 0.047 0.352 0.393 0.192 0.590 0.050 0.055 inch TYP. MAX. 0.181 0.106 0.036 0.067 0.023 0.053 0.368 0.409 0.208 0.624 0.055 0.068 DIM. D A C A2 DETAIL "A" A1 B2 B G C2 DETAIL"A" E L2 L L3 P011P6/E 6/7 STB80NF55-06 Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa - Malaysia - Malta - Morocco n Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com . 7/7 |
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