View TEA1065_83812.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
DATA SHEET
TEA1065 Versatile telephone transmission circuit with dialler interface
Product specification File under Integrated Circuits, IC03A March 1994
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
FEATURES * Current and voltage regulator mode with adjustable static resistances * Provides supply for external circuitry * Symmetrical high-impedance inputs for piezoelectric microphone * Asymmetrical high-impedance input for electret microphone * DTMF signal input with confidence tone * Mute input for pulse or DTMF dialling * Power-down input for pulse dial or register recall * Digital pulse input to drive an external switch transistor * Receiving amplifier for magnetic, dynamic or piezoelectric earpieces ORDERING INFORMATION EXTENDED TYPE NUMBER TEA1065 TEA1065T Notes 1. SOT101-1; 1998 Jun 18. 2. SOT137-1; 1998 Jun 18. QUICK REFERENCE DATA SYMBOL VLN Iline ICC line voltage normal operation line current range internal supply consumption power-down input LOW power-down input HIGH VCC supply voltage for peripherals Iline = 15 mA; MUTE input HIGH IP = 1.2 mA IP = 1.55 mA GV voltage gain range microphone amplifier earpiece amplifier GV Tamb March 1994 line loss compensation gain control range operating ambient temperature range 2 -5.5 -25 -5.9 - -6.3 +75 30 20 - - 46 45 2.7 2.5 - - - - - - 1.14 73 1.5 105 PARAMETER CONDITIONS Iline = 15 mA 10 MIN. 4.25 - TYP. 4.45 24 24 PACKAGE PINS DIL SO24 PIN POSITION MATERIAL plastic plastic
TEA1065
* Large gain setting range on microphone and earpiece amplifiers * Line loss compensation facility, line current dependent (on microphone and earpiece amplifiers) * Adjustable gain control * DC line voltage adjustment facility GENERAL DESCRIPTION The TEA1065 is a bipolar integrated circuit which performs all speech and line interface functions that are required in fully electronic telephone sets with adjustable DC mask. The circuit performs electronic switching between dialling and speech internally.
CODE SOT101L SOT137A
MAX. 4.65 150 V
UNIT mA mA A
V V dB dB dB C
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
TEA1065
handbook, full pagewidth
17 IR
+ - TEA1065 - + + -
6 5 4
GAR QR+ QR-
MIC+ MIC-
8 7
+ - -
dB
2 1
GAS1 LN
- +
24 3
DTMF MUTE VCC PD
19 20 21 18
SLPE GAS2
+
BANDGAP REFERENCE
11
SUPPLY AND REFERENCE CONTROL CURRENT
VBG
13
REFI
+ -
LINE CURRENT CONTROL
12
DOC
CURRENT REFERENCE 16 VEE 22 REG 23 AGC 9 STAB
10 DPI
14 VSI
15 CURL
MBA557
Fig.1 Block diagram.
March 1994
3
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
PINNING SYMBOL PIN LN GAS1 GAS2 QR- QR+ GAR MIC- MIC+ STAB DPI VBG DOC REFI VSI CURL VEE IR PD DTMF MUTE VCC REG AGC SLPE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DESCRIPTION positive line terminal gain adjustment; sending amplifier gain adjustment; sending amplifier inverting output; receiving amplifier non-inverting output; receiving amplifier gain adjustment; receiving amplifier inverting microphone input non-inverting microphone input current stabilizer digital pulse input bandgap output reference drive current output reference voltage input voltage sense input current limitation input negative line terminal receiving amplifier input power-down input dual-tone multifrequency input MUTE input positive supply decoupling voltage regulator decoupling automatic gain control input slope (DC resistance) adjustment Fig.2 Pinning diagram.
STAB 9 DPI 10 VBG 11 DOC 12
MBA551
TEA1065
handbook, halfpage
LN 1 GAS1 2 GAS2 3 QR- 4 QR+ 5 GAR 6
24 SLPE 23 AGC 22 REG 21 VCC 20 MUTE 19 DTMF
TEA1065
MIC- 7 MIC+ 8 18 PD 17 IR 16 VEE 15 CURL 14 VSI 13 REFI
March 1994
4
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
FUNCTIONAL DESCRIPTION Supply: VCC, LN, SLPE, REG and STAB The circuit and its peripherals are usually supplied from the telephone line. The circuit develops its own supply voltage at VCC (pin 21) and regulates its voltage drop between LN and SLPE (pins 1 and 24). The internal supply requires a decoupling capacitor between VCC and VEE (pin 16); the internal voltage regulator has to be decoupled by a capacitor from REG (pin 22) to VEE. The internal current stabilizer is set by a 3.6 k resistor connected between STAB (pin 9) and VEE. The TEA1065 can be set either in a DC voltage regulator mode or in a DC current regulator mode. The DC mask can be selected by connecting the appropriate external components to the dedicated pins (VSI, REFI, DOC, VBG). When the DC current regulator mode is not required it can be cancelled by connecting pin VSI to VEE; pins REFI, VBG and DOC are left open-circuit. Voltage regulator mode The voltage regulator mode is achieved when the line current is less than the current Iknee as illustrated in Fig.3. With R13 = R14 = 30 k, the current Iknee = 30 mA (Ip = 0 mA).
TEA1065
This line current value will be reached when the voltage on pin VSI (almost equal to the voltage on pin SLPE) exceeds the voltage on pin REFI (equal to the voltage on pin VBG divided by the resistor tap R13, R14). For other values of R13 and R14, the Iknee current is given by the following formula: Iknee = ICC + IP + (VBG/R9) x {R14/(R14 + R13)} - (R15/R9) x IO(VSI) ICC is the current required by the circuit itself (typ. 1.14 mA). IP is the current required by the peripheral circuits connected between VCC and VEE. IO(VSI) is the output current from pin VSI (typ. 2.5 A). The DC slope of the Vline/Iline curve is, in this mode, determined by R9 (R9 = R9a + R9b) in series with the rds of the external line current control transistor (see Fig.4; rds = VGS/ID at VGS = VDS). Current regulator mode The current regulator mode is achieved when the line current is greater than Iknee. In this mode, the slope of the Vline/Iline curve is approximately 1300 with R9 = 20 , R16 = 1 M, R13 = R14 = 30 k. For other values of these resistances, the slope value can be approximated by the following formula: R9 x {1 + R16 x (1/R13 + 1/R14)}
handbook, full pagewidth
MBA567
line current
Iknee
0
0
voltage regulator mode
current regulator mode
set voltage
Fig.3 Voltage and current regulator mode.
March 1994
5
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
The DC current flowing into the set is determined by the exchange supply voltage (Vexch), the DC resistance of the subscriber line (Rline) and the DC voltage on the subscriber set (see Fig.4). If the line current exceeds ICC + 0.3 mA, required by the circuit itself (ICC 1.14 mA), plus the current Ip required by the peripheral circuits connected to VCC then the voltage regulator will divert the excess current via LN. VLN = Vref + ISLPE x R9 = Vref + (Iline - ICC - 0.3 x 10-3 - Ip) x R9 where: Vref is an internally generated temperature compensated reference voltage of 4.18 V and R9 is an external resistor connected between SLPE and VEE. The preferred value of R9 is 20 . Changing R9 will influence the microphone gain, gain control characteristics, sidetone and the maximum output swing on LN. In this instance, the voltage on the line (excluding the diode rectifier bridge; see Fig.4) is: Vline = VLN + VGS + R16 x IDOC where: VGS is the voltage drop between the gate and source terminal of the external line current control transistor and IDOC is the current sunk by pin DOC (IDOC = 0 in the voltage regulator mode and increases with
TEA1065
Iline in the current regulator mode). Under normal conditions ISLPE >> ICC + 0.3 mA + Ip and for the voltage regulator mode (Iline < Iknee), the static behaviour of the circuit is equal to a 4.18 V voltage regulator diode with an internal resistance of R9 in series with the VGSon of the external line current control transistor. For the current regulator mode (Iline > Iknee), the static behaviour of the circuit is equal to a 4.18 V voltage regulator diode with an internal resistance of R9 in series with the VGSon of the external line current control transistor and also in series with a DC voltage source R16 x IDOC (the preferred value of R16 is 1 M at this value the current IDOC is negligible compared to Iline). In the audio frequency range the dynamic impedance between LN and VEE is equal to R1 (see Fig.8). The internal reference voltage Vref can be adjusted by means of an external resistor RVA. This resistor, connected between LN and REG, will decrease the internal reference voltage. When RVA is connected between REG and SLPE the internal reference voltage will increase. The maximum allowed line current is given in Figs 5 and 6, where the current is shown as a function of the required reference voltage, ambient temperature and applied package.
handbook, full pagewidth
Rline
Vline
Iline ISLPE + 0.5 mA DOC 12 LN 1
R1
IDOC R16
ICC VCC 21 Ip
Rexch
TEA1065
DC AC 0.3 mA C1 peripheral circuits
Vexch
22 REG C3
9 STAB R5
24 SLPE R9
16 VEE
MBA550
Fig.4 Supply arrangement.
March 1994
6
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
The current Ip, available from VCC for supplying peripheral circuits, depends on the external components and on the line current. Fig.7 shows this current for VCC > 2.2 V and for VCC > 3 V, where 3 V is the minimum supply voltage for most CMOS circuits including a diode voltage drop for a back-up diode. If MUTE is LOW the available current is further reduced when the receiving amplifier is driven (earpiece amplifier supplied from VCC).
TEA1065
MBA570
MBA571
handbook, halfpage
ILN 170 (mA) 150 130 110
(2) (1)
handbook, halfpage
ILN 170
(mA) 150 130 110 90 70
(5) (1)
(2) (3)
90 70 50 30 2 4 6 8 10 12 VLN-VSLPE (V)
(4)
50 30 2 4 6 8 10 12 VLN-VSLPE (V)
Tamb (1) (2) Tamb (1) (2) 65 C 75 C Ptot 1.2 W 1.0 W (3) (4) (5) 35 C 45 C 55 C 65 C 75 C 1.2
Ptot W 1.07 W 0.93 W 0.8 W 0.67 W
Fig.5 TEA1065 safe operating area.
Fig.6 TEA1065T safe operating area.
March 1994
7
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
TEA1065
handbook, halfpage
3
MBA569
IP (mA)
(1)
2
(2)
1
(3)
(4)
0 0 1 2 3 VCC (V) 4
Iline = 15 mA at VLN = 4.45 V R1 = 620 R9 = 20 Curve (1) and (3) are valid when the receiving amplifier is not driven or when MUTE = HIGH, curves (2) and (4) are valid when MUTE = LOW and the receiving amplifier is driven, Vo(rms) = 150 mV, RL = 150 (asymmetrical). (1) = 2.2 mA; (2) = 1.77 mA; (3) = 0.78 mA and (4) = 0.36 mA.
Fig.7 Maximum current Ip available from VCC for external (peripheral) circuitry with VCC > 2.2 V and VCC > 3 V.
handbook, halfpage
LN Leq Vref Rp REG C3 4.7 F R1 VCC C1 VEE
SLPE R9 20
MBA552
Leq = C3 x R9 x Rp Rp = 17.5 k
Fig.8
Equivalent circuit impedance between LN and VEE.
March 1994
8
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
Microphone inputs MIC+ and MIC- and gain adjustment connections GAS1 and GAS2 The TEA1065 has symmetrical microphone inputs, its input impedance is 40.8 k (2 x 20.4 k) and its voltage gain is typ. 38 dB with R7 = 68 k. Either dynamic, magnetic or piezoelectric microphones can be used, or an electret microphone with a built-in FET buffer. Arrangements for the microphones types are illustrated in Fig.9.
TEA1065
The gain of the microphone amplifier is proportional to external resistor R7, connected between GAS1 and GAS2, which can be adjusted between 30 dB and 46 dB to suit the sensitivity of the transducer. An external 100 pF capacitor (C6) is required between GAS1 and SLPE to ensure stability. A larger value of C6 may be chosen to obtain a first-order low-pass filter. The "cut-off" frequency corresponds with the time constant R7 x C6.
handbook, full pagewidth
VCC MIC+ 8
(1)
MIC- 7
21
MIC+ 8
MIC-
7
MIC+
8 16 VEE
MIC-
7
MBA553
(a) (a) magnetic or dynamic microphone, the resistor (1) may be connected to reduce the terminating impedance, or for sensitive types a resistive attenuator can be used to prevent overloading the microphone inputs;
(b) (b) electret microphone;
(c) (c) piezoelectric microphone.
Fig.9 Microphone arrangements.
March 1994
9
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
MUTE input When MUTE = HIGH the DTMF input is enabled and the microphone and receiving amplifier inputs are inhibited. When MUTE = LOW or open-circuit the DTMF input is inhibited and the microphone and receiving amplifier inputs are enabled. Switching the MUTE input will cause negligible clicks at the earpiece outputs and on the line. An electrostatic discharge protection diode is connected between pin MUTE and pin VCC (pins 20 and 21). Dual-tone multifrequency input DTMF When the DTMF input is enabled, dialling tones may be sent onto the line. The voltage gain from DTMF to LN is typ. 12.5 dB less than the gain of the microphone amplifier and varies with R7 in the same way as the gain of the microphone amplifier. This means that the tone level at the DTMF input has to be adjusted after setting the gain of the microphone amplifier. When R7 = 68 k the gain is typically 25.5 dB. The signalling tones can be heard in the earpiece at a low level (confidence tone). Receiving amplifiers: IR, QR+, QR- and GAR The receiving amplifier has one input IR and two complementary outputs, QR+ (non-inverting) and
TEA1065
QR- (inverting). These outputs may be used for single-ended or differential drive, depending on the type and sensitivity of the earpiece used (see Fig.10). Gain from IR to QR+ is typically 31 dB with R4 = 100 k, which is sufficient for low-impedance magnetic or dynamic earpieces which are suitable for single-ended drive. By using both outputs (differential drive) the gain is increased by 6 dB. Differential drive can be used when earpiece impedance exceeds 450 as with high impedance dynamic, magnetic or piezoelectric earpieces. The output voltage of the receiving amplifier is specified for continuous-wave drive. The maximum output voltage will be higher under speech conditions where the ratio of peak and RMS value is higher. The gain of the receiving amplifier can be adjusted over a range of -11 dB to +8 dB to suit the sensitivity of the transducer that is used. The gain is proportional to external resistor R4 connected between GAR and QR+. Two external capacitors, C4 = 100 pF and C7 = 1 nF, are necessary to ensure stability. A larger value of C4 may be chosen to obtain a first-order low-pass filter. The "cut-off" frequency corresponds with the time constant R4 x C4.
handbook, full pagewidth
5 4 16
QR+ QR- VEE
5
QR+
5
QR+
(1)
5
QR+
(2)
4
QR-
4
QR-
4
QR-
MBA554
(a)
(b)
(c)
(d)
Fig.10 Alternative receiver arrangements: (a) dynamic earpiece with an impedance less than 450 ; (b) dynamic earpiece with an impedance more than 450 ; (c) magnetic earpiece with an impedance more than 450 , resistor (1) may be connected to prevent distortion (inductive load); (d) piezoelectric earpiece, resistor (2) is required to increase the phase margin (stability with capacitive load).
March 1994
10
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
Automatic gain control
TEA1065
Automatic compensation of line loss is obtained by connecting a resistor (R6) between AGC and VEE. The automatic gain control varies the gain of the microphone amplifier and receiving amplifier in accordance with the DC line current (see Fig.12). The control range is 5.9 dB; this corresponds to a line length of 3.5 km of twisted pair cable (see Fig.11). The DTMF gain is not affected by this feature. If automatic line loss compensation is not required the AGC pin can be left open-circuit, the amplifiers then give their maximum gain.
handbook, full pagewidth
34.8
75 H
75 H 24.3 nF
34.8
13 nF 24.3 nF 34.8 75 H 75 H 34.8
MBA572
Fig.11 Typical 0.5 km line cell model used for automatic gain control optimization.
handbook, full pagewidth
1 Gv (dB) R6 =
MBA549
0 -1
-3
-5
R6 =
86.6 k
118 k
147 k
187 k
-7
0
20
40
60 Iline (mA)
80
Fig.12 Variation of gain as a function of line current with R6 as a parameter; R9 = 20 .
March 1994
11
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
Power-down input PD During pulse dialling or register recall (timed-loop-break) the telephone line is interrupted, consequently it provides no supply for the transmission circuit and the peripherals connected to VCC. These gaps have to be bridged by the charge in the smoothing capacitor C1. The requirement on this capacitor is relaxed by applying a HIGH level to the PD input during the loop-break. This reduces the internal supply current from typ. 1.14 mA to 73 A. A HIGH level at PD also disconnects the capacitor at REG which results in the voltage stabilizer having no switch-on delay after line interruptions. This results in no contribution of the IC to the current waveform during pulse dialling or register recall. When this facility is not required PD may be left open-circuit or connected to VEE. An electrostatic discharge protection diode is connected between pin PD and VCC. Digital pulse input DPI A HIGH level at DPI creates a current which flows from pin DOC to VEE in order to interrupt the line current by the external line current control transistor (see Fig.18; MOSFET BUK554). A LOW level (or pin left open-circuit) disables this current to provide the normal DC regulation (voltage or current). A simple application without regulation of current in pulse dialling mode is given in Fig.18. When DPI is activated (HIGH level), the external line current control transistor is switched off resulting in no current in the TEA1065. The voltage on pin SLPE becomes zero and capacitor C15 discharges cancelling the current regulation when DPI becomes inactive (LOW level). To provide a constant regulation (in speech mode and pulse mode), an external transistor is required to keep C15 charged during DPI active (see Fig.19 in which the Field Effect Transistor BSJ177 is directly driven by the DPI signal). An electrostatic discharge protection diode is connected between pin DPI and pin VCC. Voltage sense input and reference voltage input VSI and REFI The voltage on pin VSI represents the DC voltage of pin SLPE. The RC filter (R15 x C15) is also intended to disable the DC regulation when C15 is shunted or not yet charged (especially directly after hook-off). The time constant R15 x C15 determines approximately the time when no regulation (except CURL pin limitation) is
TEA1065
activated. The voltage applied on pin REFI represents a fraction of the bandgap reference voltage given by pin VBG (resistor tap R13 and R14) in order to determine Iknee. Drive current output DOC Pin DOC drives the external line current control transistor in order to achieve line interruption during pulse dialling (or register recall) and also the DC slope when Iline > Iknee. The current sunk by pin DOC is determined by the voltage on pin VSI in comparison with the voltage on pin VBG divided by the resistor tap R13 and R14. When pin DPI is activated, pin DOC changes to a low voltage (by trying to sink typ. 900 A to VEE) to switch off the external line current control transistor. Bandgap reference output VBG This output provides a voltage reference to set the knee line current with the following formula: Iknee = ICC + IP + (VBG/R9) x {R14/(R14 + R13)} - (R15/R9) x 2.5 x 10-6 In order to improve stability, a capacitive load is not allowed on this output. Current limit input CURL This input is applied to the base of an internal NPN transistor which has its collector connected to pin DOC and its emitter to VEE (see Fig.13). The transistor limits the line current just after hook-off or during line transients to a value given by the following formula: Ihook-off = I(R1) + VBE/R9b VBE is the base-emitter voltage of the transistor (typ. 700 mV at 25 C). I(R1) is the current flowing through R1 to charge C1 just after hook-off.
handbook, halfpage
DOC IC (collector current) CURL
VEE
MBA556
Fig.13 Internal current limiting transistor.
March 1994
12
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
The maximum hook-off current then becomes: Ihook-off = VZ/R1 + VBE x (R9a + R9b + R1)/(R1 x R9b) where VZ is the Zener voltage of diode D5 (see Fig.18). Side-tone suppression Suppression of the transmitted signal in the earpiece is obtained by the anti-sidetone network comprising R1//Zline, R2, R3, R9 and Zbal (see Fig.18). Maximum compensation is obtained when the following conditions are fulfilled: a) R9 x R2 = R1 x (R3 + R8) b) k = R3 x (R8 + R9)/(R2 x R9) c) Zbal = k x Zline The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. In practice Zline varies considerably with the line length and line type. Therefore, the value chosen for Zbal should be for an average line length giving satisfactory sidetone suppression with long and short times. The suppression
TEA1065
also depends on the accuracy of the match between Zbal and the impedance of the average line. Example With k = 1, R1 = 619 , R9 = 20 and an average line impedance represented by 270 + (120 nF // 1100 ), the calculation results in: * R2 = 130 k * R3 = 3650 * R8 = 715 The anti-sidetone network for the TEA1060 family, shown in Fig.15, attenuates the signal received from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio-frequency range. Note More information on the balancing of the anti-sidetone bridges can be obtained in our publication "Versatile speech transmission ICs for electronic telephone sets", order number 9398 341 10011.
handbook, full pagewidth
Iline
MBA568
Ihook-off
0
0
hook-off
speech mode
pulse dialling mode
time
Fig.14 Example of line current shape in pulse dialling mode (see also Fig.18).
March 1994
13
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
TEA1065
handbook, full pagewidth
LN
Zline
R1
R2
VEE
im R3 R9 R8 SLPE Zbal
IR Rt
MBA555
Fig.15 Equivalent circuit of TEA1060 family anti-sidetone bridge.
LIMITING VALUES In accordance with the absolute maximum system (IEC 134) SYMBOL VLN VDOC VLN ILN VI Ptot Tstg Tamb Tj PARAMETER positive line voltage continuous positive DOC voltage continuous repetitive line voltage during switch-on or line interruption line current (see also Fig.5 and 6) input voltage on pins other than LN, DOC, VSI, REFI and CURL total power dissipation storage temperature range operating ambient temperature range junction temperature see Figs 5 and 6 -40 -25 - + 125 +75 +125 C C C CONDITIONS - - - - VEE - 0.7 MIN. MAX. 12 12 13.2 150 VCC + 0.7 V V V mA V UNIT
THERMAL RESISTANCE SYMBOL Rth j-a Rth j-a Note 1. TEA1065T is mounted on glassy epoxy board 28.5 x 19.1 x 1.5 mm HANDLING Every pin withstands the ESD test in accordance with MIL-STD-883C class 2, method 3015 (HBM 1500 , 100 pF, 3 positive pulses and 3 negative pulses on each pin as a function of pin VEE. March 1994 14 PARAMETER from junction to ambient in free air; TEA1065 from junction to ambient in free air; TEA1065T
(1)
TYP. - -
MAX. 50 75
UNIT K/W K/W
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
CHARACTERISTICS ILN = 10 to 150 mA; VEE = 0 V; f = 800 Hz; Tamb = 25 C; R9 = 20 ; unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP.
TEA1065
MAX.
UNIT
Supply LN and VCC (pins 1 and 21) VLN voltage drop over circuit Iline = 5 mA Iline = 15 mA Iline = 100 mA Iline = 140 mA VLN/T VLN variation with temperature voltage drop over circuit Iline = 15 mA Iline = 15 mA RVA = R1-22 = 68 k RVA = R22-24 = 39 k ICC supply current PD = LOW; VCC = 2.8 V PD = HIGH; VCC = 2.8 V Microphone inputs MIC+ and MIC- (pins 8 and 7) Z I Gv Gvf GvT input impedance voltage gain variation with frequency referred to 800 Hz variation with temperature referred to 25 C Iline = 15 mA; R7 = 68 k Iline = 15 mA; f = 300 to 3400 Hz Iline = 50 mA; Tamb = -25 to 75 C; without R6 Dual-tone multi-frequency input DTMF (pin 19) ZI Gv Gvf GvT input impedance voltage gain variation with frequency referred to 800 Hz variation with temperature referred to 25 C Gv Iline = 15 mA; R7 = 68 k Iline = 15 mA f = 300 to 3400 Hz Iline = 50 mA; Tamb = -25 to +75 C -8 - +8 dB - 0.5 - dB 16.8 24.5 -0.5 20.7 25.5 0.2 24.6 26.5 +0.5 k dB dB - 0.5 - dB 18.5 37 -0.5 20.4 38 0.2 24.3 39 +0.5 k dB dB 3.6 4.7 - - 3.9 5.0 1.14 73 4.15 5.3 1.5 105 V V mA A 3.95 4.25 5.4 - -3 4.25 4.45 6.1 - -1 4.55 4.65 6.7 7.5 +1 V V V V mV/K
Gain adjustment GAS1 and GAS2 (pin 2 and 3) gain variation with R7 connected between pins 2 and 3; transmitting amplifier
March 1994
15
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TEA1065
MAX.
UNIT
Transmitting amplifier output LN (pin 1) VLN(rms) output voltage (RMS value) Iline = 15 mA dtot = 2% dtot = 10% Vno(rms) noise output voltage (RMS value) Iline = 15 mA; R7 = 68 k; pin 7 and 8 open-circuit psophometrically weighted (P53 curve); control transistor included (MOS BUK554 type see Fig.18) Receiving amplifier input IR (pin 17) ZI ZO Gv input impedance 17 - Iline = 15 mA; R4 = 100 k single-ended; RT = 300 differential; RT = 600 Gvf GvT VO(rms) variation with frequency referred to 800 Hz variation with temperature referred to 25 C output voltage (RMS value) without R6; Iline = 50 mA; Tamb = -25 to +75 C Iline = 15 mA; THD = 2%; sinewave drive; R4 = 100 k single-ended; RT = 150 differential; RT = 450 differential; CT = 60 nF; (1500 series resistor); f = 3400 Hz Iline = 30 mA; differential; CT = 60 nF; (1500 series resistor); f = 3400 Hz VO(rms) noise output voltage (RMS value) Iline = 15 mA; R4 = 100 k single-ended; RT = 300 differential; RT = 600 March 1994 16 - - 50 100 - - V V 1.02 1.22 - V 0.3 0.56 0.87 0.38 0.72 1.07 - - - V V V - 0.2 - dB f = 300 to 3400 Hz 30 36 -0.5 31 37 0.2 32 38 +0.5 dB dB dB 21 25 - k 1.9 - - 2.3 2.6 -68 - - - V V dBmp
Receiving amplifier outputs QR+ and QR- (pin 5 and 4) output impedance voltage gain 4
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
SYMBOL Gv PARAMETER CONDITIONS MIN. -11 - TYP.
TEA1065
MAX. +8
UNIT
Gain adjustment GAR (pin 6) receiving amplifier, gain adjustment range Mute input MUTE (pin 20) VIH VIL IMUTE Gv Gv input voltage HIGH input voltage LOW input current change of microphone amplifier gain voltage gain from DTMF input to QR+ or QR- Power-down input PD (pin 18) VIH VIL IPD Gv input voltage HIGH input voltage LOW input current 1.5 -5.5 2.5 -5.9 VCC 0.3 5.0 -6.3 V V A MUTE = HIGH; R4 = 100 k single-ended; RT = 300 -19 -17 -15 dB MUTE = HIGH 1.5 - - - - - 8 -70 VCC 0.3 15 - V V A dB dB
Automatic gain control input AGC (pin 23) controlling the gain from IR to QR+, QR- and the gain from MIC+, MIC- to LN; gain control range with respect to Iline = 15 mA Iline Iline Gv highest line current for maximum gain lowest line current for minimum gain change of gain between Iline = 15 and 35.5 mA Current limiting input CURL (pin 15) VBE HFE IC(max) base-emitter voltage drop of internal transistor current gain of internal transistor maximum collector current of internal transistor Bandgap reference voltage output VBG (pin 12) VBG IBG ZO March 1994 reference voltage output drive capability output impedance 17 note 1 - -100 - 1.22 12 - +50 - V A see Fig.13; IC = 50 A = IDOC see Fig.13; IC = 50 A = IDOC see Fig.13 - - 2 mA 60 120 - - 0.7 - V - -1.5 - dB - 50 - mA - 28 - mA R6 = 118 k dB
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
SYMBOL PARAMETER CONDITIONS - - MIN. TYP. -2.5 - -
TEA1065
MAX.
UNIT A
Voltage sense input VSI (pin 14) IO IO IO output current pin VSI connected to VEE
Reference input REFI (pin 13) output current 2.0 - mA A
Drive current output DOC (pin 11) output current REFI connected to VEE; VSI not connected; DPI = LOW REFI not connected; VSI connected to VEE; DPI = HIGH Digital pulse input DPI (pin 10) VIH VIL IDPI Note 1. No capacitive load on the VBG output. Positive current is defined as conventional current flow into a device. Negative current is defined as conventional current flow out of a device. input voltage HIGH input voltage LOW input current 1.5 - - - - 2.5 VCC 0.3 5 V V A 200 900 - A 120 300
March 1994
18
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
TEA1065
handbook, full pagewidth
R1 620 21 17 8 Vi 7 19 VCC IR MIC+ MIC- DTMF MUTE PD VSI VEE 16 13 REFI 12 DOC 1 LN 11 VBG QR- QR+ CURL 4 5 15 6 C7 1 nF 20 18 10 F 14 GAS1 DPI 2 10 3 R7 68 k R4 100 k 100 F RL 600 C4 100 pF
Iline
Vo
C1
100 F
TEA1065
GAR
5 to 140 mA
Vi
REG 22 C3 4.7 F
AGC 23 R6 118 k
STAB 9 R5 3.6 k
GAS2 SLPE 24 R9 20
C6 100 pF
MBA558
Voltage gain is defined as Gv = 20 Log Vo/Vi. For measuring the gain from MIC+ and MIC- the MUTE input should be LOW or open-circuit, for measuring the DTMF input MUTE should be HIGH. Inputs not under test should be open-circuit except VSI that should be connected to VEE.
Fig.16 Test circuit for defining voltage gain of MIC+, MIC- and DTMF inputs.
March 1994
19
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
TEA1065
handbook, full pagewidth
R1 620 21 17 8 7 19 VCC IR MIC+ MIC- DTMF MUTE PD VSI VEE 16 13 REFI 12 DOC 1 LN 11 VBG QR- QR+ CURL 4 ZL 5 15 6 C7 1 nF 20 10 F 18 14 GAS1 DPI 2 10 3 R7 68 k R4 100 k RL 600 C4 100 pF Vo 100 F
Iline
C1
100 F
TEA1065
GAR
5 to 140 mA
Vi
REG 22 C3 4.7 F
AGC 23 R6 118 k
STAB 9 R5 3.6 k
GAS2 SLPE 24 R9 20
C6 100 pF
MBA559
Voltage gain is defined as Gv = 20 Log V o/Vi.
Fig.17 Test circuit for defining voltage gain of the receiving amplifier.
March 1994
20
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... March 1994
R16 1 M BAS11 (4x) D1 D2 100 nF 4 telephone line D4 D3 R11 R3 3.65 k R4 100 k C7 C4 100 pF 1 nF 8 D5 BZX79c BV2 MIC+ VEE AGC GAS2 3 R7 VSI 14 REFI 13 VBG 11 R13 30 k CURL STAB 15 9 REG 22 16 R6 5 QR+ QR- MUTE PD R2 130 k 12 C5 17 DOC IR 6 GAR
Philips Semiconductors
handbook, full pagewidth
Versatile telephone transmission circuit with dialler interface
MOSN1 BUK554
R1 620
+
21 VCC DTMF 19 from dial and control circuits C1 100 F
1 LN
20 18
-
TEA1065
DPI
10
21
R8 715 Zbal
7
23
MIC- SLPE GAS1 24 C6 2
100 pF 68 k R15 R9a 15 15 k C15 6.8 F
R14 30 k
R5 3.6 k
C3 4.7 F
R9b 5
Product specification
TEA1065
MBA561
Fig.18 Typical application of the TEA1065, with a piezoelectric earpiece and DTMF dialling.
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... March 1994
R16 1 M BAS11 (4x) D1 D2 100 nF 4 telephone line D4 D3 R11 R3 3.65 k R4 100 k C7 C4 100 pF 1 nF 8 D5 BZX79c BV2 MIC+ VEE AGC GAS2 3 R7 VSI 14 REFI 13 VBG 11 R13 30 k CURL STAB 15 9 REG 22 16 R6 5 QR+ QR- MUTE PD R2 130 k 12 C5 17 DOC IR DTMF 6 GAR
Philips Semiconductors
handbook, full pagewidth
Versatile telephone transmission circuit with dialler interface
MOSN1 BUK554
R1 620
+
21 VCC 19 20 18 from dial and control circuits
1 LN
C1 100 F
TEA1065
DPI
10
-
22
R8 715 Zbal DTMF dialling requires a different protection arrangement.
7
23
MIC- SLPE GAS1 24 C6 2
100 pF 68 k R15 R9a 15 15 k C15 6.8 F
R14 30 k
R5 3.6 k
C3 4.7 F
R9b 5
JFP1 BSJ177
Product specification
TEA1065
MBA560
Fig.19 Typical application of the TEA1065, with a piezoelectric earpiece and pulse dialling.
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
PACKAGE OUTLINES DIP24: plastic dual in-line package; 24 leads (600 mil)
TEA1065
SOT101-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 b 24 13 MH wM (e 1)
pin 1 index E
1
12
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 5.1 0.20 A1 min. 0.51 0.020 A2 max. 4.0 0.16 b 1.7 1.3 0.066 0.051 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 32.0 31.4 1.26 1.24 E (1) 14.1 13.7 0.56 0.54 e 2.54 0.10 e1 15.24 0.60 L 3.9 3.4 0.15 0.13 ME 15.80 15.24 0.62 0.60 MH 17.15 15.90 0.68 0.63 w 0.25 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT101-1 REFERENCES IEC 051G02 JEDEC MO-015AD EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-23
March 1994
23
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
TEA1065
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A X
c y HE vMA
Z 24 13
Q A2 A1 pin 1 index Lp L 1 e bp 12 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT137-1 REFERENCES IEC 075E05 JEDEC MS-013AD EIAJ EUROPEAN PROJECTION A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 15.6 15.2 0.61 0.60 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
ISSUE DATE 95-01-24 97-05-22
March 1994
24
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TEA1065
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
March 1994
25
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA1065
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
March 1994
26
Philips Semiconductors
Product specification
Versatile telephone transmission circuit with dialler interface
NOTES
TEA1065
March 1994
27
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 Internet: http://www.semiconductors.philips.com
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
415102/00/02d/pp28
Date of release: March 1994
Document order number:
9397 750 nnnnn

▲Up To Search▲

Price & Availability of TEA1065

	To Download TEA1065 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .