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TEA6420 BUS-CONTROLLED AUDIO MATRIX . . . . . . . 5 STEREO INPUTS 4 STEREO OUPUTS GAIN CONTROL 0/2/4/6dB/MUTE FOR EACH OUTPUT CASCADABLE (2 different addresses) SERIAL BUS CONTROLLED VERY LOW NOISE VERY LOW DISTORSION SHRINK24 (Plastic Package) ORDER CODE : TEA6420 DESCRIPTION The TEA6420 switches 5 stereo audio inputs on 4 stereo outputs. All the switching possibilities are changed through the I2C bus. PIN CONNECTIONS SHRINK24 GND CAPACITANCE VS L1 L2 L3 L4 L5 LOUT1 ROUT1 LOUT2 ROUT2 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 SDA SCL ADDR R1 R2 R3 R4 R5 ROUT4 LOUT4 ROUT3 LOUT3 GND CAPACITANCE VS L1 L2 L3 NC NC L4 L5 LOUT1 ROUT1 LOUT2 ROUT2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SO28 (Plastic Micropackage) ORDER CODE : TEA6420D SO28 28 27 26 25 24 23 22 21 20 19 18 17 16 15 SDA SCL ADDR R1 R2 R3 NC NC R4 R5 6420-01.EPS / 6420-02.EPS ROUT4 LOUT4 ROUT3 LOUT3 May 1996 1/6 TEA6420 BLOCK DIAGRAM RIGHT INPUTS T E A 6 4 2 0 GAIN = 0/2/4/6dB RIGHT OUTP UTS VS SDA SUPPLY C BUS DECODER S CL ADDR GND LEF T OUTP UTS LEF T INPUTS ABSOLUTE MAXIMUM RATINGS Symbol VCC Toper Tstg Supply Voltage Operating Ambient Temperature Storage Temperature Parameter Value 10.2 0, + 70 - 20, + 150 Unit o o C C THERMAL DATA R th(j-a) Junction Ambient Thermal Resistance SHRINK24 SO28 75 75 o C/W ELECTRICAL CHARACTERISTICS TA = 25oC, VS = 10V, RL = 10k, RG = 600, f = 1kHz (unless otherwise specified) Symbol SUPPLY VS IS SVR MATRIX VIN RI CS Input DC Level Input Resistance Channel Separation VIN = 2VRMS f = 1kHz Gain = 0dB Gain = 6dB 4.5 30 80 70 5 50 90 82 5.5 100 V dB dB 6420-03.TBL Parameter Test Conditions Min. Typ. Max. Unit Supply Voltage Supply Current Ripple Rejection VIN = 500mVRMS, BW = 20 - 20kHz 8 70 9 5 80 10.2 8 V mA dB k 2/6 6420-02.TBL Symbol Parameter Value Unit 6420-01.TBL V 6420-03.EPS GAIN = 0/2/4/6dB TEA6420 ELECTRICAL CHARACTERISTICS (continued) TA = 25oC, VS = 10V, RL = 10k, RG = 600, f = 1kHz (unless otherwise specified) Symbol OUTPUT BUFFER VOUT R OUT eNI S/N Gmin Gmax d VCL RL BUS INPUT VIL VIN II VO Rpu Input Low Voltage Input High Voltage Input Current Output Voltage ADDR Pullup Resistor IO = 3mA ; SDA Acknowledge pin Note 40 50 3 - 10 10 0.4 1.5 V V V k 6420-04.TBL 6420-06.TBL 6420-05.TBL Parameter Test conditions Min. Typ. Max. Unit Output DC Level Output Resistance Input Noise Signal to Noise Ratio Min. Gain Max. Gain Distortion Clipping Level Output Load Resistance VIN = VOUT = 1VRMS d = 0.3% BW = 20 - 20kHz, flat VIN = VOUT = 1VRMS 4.5 5 70 3 110 5.5 200 V V dB -1 5 2 2 0 6 0.01 2.5 +1 7 0.05 dB dB % VRMS k A Note : Rpu is an internal pull-up resistor connected between the address programming pin ADDR and the internal positive supply voltage. Leaving ADDR disconnected or "floating" allows it to become logic 1. Connecting ADDR externally to the GND pin forces it to logic 0. SOFTWARE SPECIFICATION 1. Chip address Address 1001 1000 1001 1010 HEX 98 9A ADDR 0 1 2. Data bytes Output select X 0 0 1 1 Q1 0 1 0 1 Q0 G1 G0 I2 I1 I0 Output Output Output Output Input Input Input Input Input Mute Gain Gain Gain Gain 1 2 3 4 5 1 2 3 4 Input select X G1 G0 0 0 0 0 1 1 I2 0 0 1 1 0 0 I1 0 1 0 1 0 1 I0 Gain select X Q1 Q0 0 0 1 1 0 1 0 1 = 6 dB = 4 dB = 2 dB = 0 dB X = don't care MSB is transmitted first Example : 0 10 01 100 connects outputs 3 with input 5 at a gain of 4dB The following are selected after power-on reset : input 5 selected for all outputs ; gain = 0dB. 3/6 TEA6420 TYPICAL APPLICATION (DIP package) 1 22 F +9V 24 23 SDA SCL 2 Bus Inputs SW 3 100nF C1 C2 Left Inputs C3 C4 C5 L R L R C11 C12 C13 C14 22 4 5 6 7 8 9 10 11 12 CH1 Output T E A 6 4 2 0 21 20 19 18 17 16 15 14 13 C6 C7 C8 C9 C10 C18 C17 C16 C15 R L R L Right Inputs CH4 Output C1 - C18 = 4.7F 4/6 6420-04.EPS CH2 Output CH3 Output TEA6420 PACKAGE MECHANICAL DATA 24 PINS - PLASTIC SHRINK E E1 A1 A2 Stand-off B B1 e e1 e2 L c D E 24 13 F .015 0,38 Gage Plane A 1 12 e3 SDIP24 e2 Dimensions A A1 B B1 C D E E1 e e1 e2 e3 L Min. 0.51 3.05 0.36 0.76 0.23 22.61 7.62 6.10 Millimeters Typ. Max. 5.08 4.57 0.56 1.14 0.38 23.11 8.64 6.86 Min. 0.020 0.120 0.0142 0.030 0.0090 0.890 0.30 0.240 Inches Typ. Max. 0.20 0.180 0.0220 0.045 0.0150 0.910 0.340 0270 3.30 0.46 1.02 0.25 22.86 6.40 1.778 7.62 0.130 0.0181 0.040 0.0098 0.90 0.252 0.070 0.30 2.54 3.30 0.10 0.130 5/6 SDIP24.TBL 10.92 1.52 3.81 0.430 0.060 0.150 PMSDIP24.EPS TEA6420 PACKAGE MECHANICAL DATA 28 PINS - PLASTIC MICROPACKAGE Dimensions A a1 b b1 C c1 D E e e3 F L S Min. 0.1 0.35 0.23 Millimeters Typ. Max. 2.65 0.3 0.49 0.32 45 (Typ.) o Min. 0.004 0.014 0.009 Inches Typ. Max. 0.104 0.012 0.019 0.013 0.5 17.7 10 1.27 16.51 7.4 0.4 7.6 1.27 8 (Max.) o 0.020 18.1 10.65 0.697 0.394 0.050 0.65 SO28.TBL 0.713 0.419 0.291 0.016 0.299 0.050 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1996 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 6/6 PM-SO28.EPS |
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