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Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
DESCRIPTION
The ICM7555 is a CMOS timer providing significantly improved performance over the standard NE/SE555 timer, while at the same time being a direct replacement for those devices in most applications. Improved parameters include low supply current, wide operating supply voltage range, low THRESHOLD, TRIGGER, and RESET currents, no crowbarring of the supply current during output transitions, higher frequency performance and no requirement to decouple CONTROL VOLTAGE for stable operation. The ICM7555 is a stable controller capable of producing accurate time delays or frequencies. In the one-shot mode, the pulse width of each circuit is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free-running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the bipolar 555 device, the CONTROL VOLTAGE terminal need not be decoupled with a capacitor. The TRIGGER and RESET inputs are active low. The output inverter can source or sink currents large enough to drive TTL loads or provide minimal offsets to drive CMOS loads.
PIN CONFIGURATION
D and N Packages
GND 1
TRIGGER OUTPUT 2 3 8 7 6 5 VDD DISCHARGE THRESHOLD CONTROL VOLTAGE
RESET 4
* Timing from microseconds through hours * Operates in both astable and monostable modes * Adjustable duty cycle * High output source/sink driver can drive TTL/CMOS * Typical temperature stability of 0.005%/oC at 25C * Rail-to-rail outputs
APPLICATIONS
FEATURES
* Exact equivalent in most applications for NE/SE555 * Low supply current: 80A (typ) * Extremely low trigger, threshold, and reset currents: 20pA (typ) * High-speed operation: 500kHz guaranteed * Wide operating supply voltage range guaranteed 3 to 16V over full
automotive temperatures
* Normal reset function; no crowbarring of supply during output
transition
* Precision timing * Pulse generation * Sequential timing * Time delay generation * Pulse width modulation * Pulse position modulation * Missing pulse detector
* Can be used with higher-impedance timing elements than the
bipolar 555 for longer time constants
ORDERING INFORMATION
DESCRIPTION 8-Pin Plastic Dual In-Line Package (DIP) 8-Pin Plastic Small Outline (SO) Package 8-Pin Plastic Dual In-Line Package (DIP) 8-Pin Plastic Small Outline (SO) Package TEMPERATURE RANGE 0 to +70C 0 to +70C -40 to +85C -40 to +85C ORDER CODE ICM7555CN ICM7555CD ICM7555IN ICM7555ID DWG # 0404B 0174C 0404B 0174C
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853-1192 13721
Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
EQUIVALENT BLOCK DIAGRAM
FLIP-FLOP VDD 8 R 6 5 R COMPARATOR A + OUTPUT DRIVERS 3 RESET 4
THRESHOLD CONTROL VOLTAGE
OUTPUT
-
DISCHARGE COMPARATOR B + 7 N 1
2 TRIGGER R
-
1 NOTE: UNUSED INPUTS SHOULD BE CONNECTED TO APPROPRIATE VOLTAGE FROM TRUTH TABLE.
TRUTH TABLE
THRESHOLD VOLTAGE DON'T CARE >2/3(V+) VTH < 2/3 DON'T CARE TRIGGER VOLTAGE DON'T CARE > 1/3(V+) VTR > 1/3 <1/3(V+) RESET1 LOW HIGH HIGH HIGH OUTPUT LOW LOW STABLE HIGH DISCHARGE SWITCH ON ON STABLE OFF
NOTES: 1. RESET will dominate all other inputs: TRIGGER will dominate over THRESHOLD.
ABSOLUTE MAXIMUM RATINGS1
SYMBOL VDD VTRIG1 VCV VTH VRST IOUT PDMAX Supply voltage Trigger input voltage Control voltage Threshold input voltage RESET input voltage Output current Maximum power dissipation, TA = 25C (still air)2 N package D package TSTG TSOLD Storage temperature range Lead temperature (Soldering 60s) 1160 780 -65 to +150 300 mW mW 100 mA > -0.3 to C C
NOTES: 1. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater than VDD + 0.3V or less than GND -0.3V may cause destructive latch-up. For this reason it is recommended that no inputs from external sources not operating from the same power supply be applied to the device before its power supply is established. In multiple systems, the supply of the ICM7555 must be turned on first. 2. Derate above 25C, at the following rates: N package at 9.3mW/C D package at 6.2mW/C 3. See "Power Dissipation Considerations" section.
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Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
DC AND AC ELECTRICAL CHARACTERISTICS
TA = 25C unless otherwise specified. SYMBOL VDD IDD LIMITS PARAMETER Supply voltage Supply current1 Astable mode timing2 Initial accuracy Drift with supply voltage Drift with temperature3 TEST CONDITIONS MIN TMIN < TA < TMAX VDD = VMIN VDD = VMAX RA, RB = 1k to 100k, C = 0.1F 5V ICM7555 TYP MAX 16 200 300 V UNITS
A A
VTH VTRIG ITRIG
Threshold voltage Trigger voltage Trigger current
ITH
Threshold current
IRST VRST VCV VOL VOH VDIS tR tF FMAX
Reset current Reset voltage Control voltage Output voltage (low) Output voltage (high) Discharge output voltage Rise time of output3 Fall time of output3 Maximum oscillator frequency (astable mode)
VDD = 5V, IDIS = 10.0mA RL = 10M, CL = 10pF, VDD = 5V RL = 10M, CL = 10pF, VDD = 5V
NOTES: 1. The supply current value is essentially independent of the TRIGGER, THRESHOLD, and RESET voltages. 1.38 . The components are defined in Figure 2. 2. Astable timing is calculated using the following equation: f = (RA + 2RB)C 3. Parameter is not 100% tested.
August 31, 1994
339
Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
TYPICAL PERFORMANCE CHARACTERISTICS
225 200 TA = -55C 175 SUPPLY CURRENT (I DD ) ( A) 150 TA = +25C 125 100 75 50 25 0 0 5 10 SUPPLY VOLTAGE (VDD) 15 20 TA = +125C
Supply Current vs Supply Voltage
100.0 TA = +25C
OUTPUT SOURCE CURRENT 9mA)
VDD = 18V 10.0 VDD = 5V
1.0
VDD = 2V
0.1 0.1 1.0 VDD - VOUT (V) 10.0
High Output Voltage Drop vs Output Source Current
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Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
100.0 VDD = 18V DISCHARGE CURRENT (mA) TA = 25C
VDD = 5V 10.0
VDD = 2V
1.0
0.1 0.1 1.0 DISCHARGE VOLTAGE (V) 10.0
Discharge Low Output Voltage vs Discharge Sink Current
100.0 TA = +125C
OUTPUT CURRENT (mA)
10.0
VDD = 18V
VDD = 5V
1.0 VDD = 2V
0.1 0.1 1.0 OUTPUT VOLTAGE (V) 10.0
Low Output Voltage vs Output Sink Current
August 31, 1994
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Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
100.0 TA = 25C VDD = 18V 10.0 VDD = 5V VDD = 2V 1.0
OUTPUT CURRENT (mA)
0.1 0.1 1.0 OUTPUT VOLTAGE (V) 10.0
Low Output Voltage vs Output Sink Current
100.0 VDD = 18V TA = -55C
OUTPUT CURRENT (mA)
VDD = 5V 10.0 VDD = 2V
1.0
0.1 0.1 1.0 OUTPUT VOLTAGE (V) 10.0
Low Output Voltage vs Output Sink Current
500
PULSE WIDTH FOR TRIGGER (ns)
400
300
200
VDD = 2V
100
VDD = 5V VDD = 18V
0 0 10 20 30 40 LOWEST LEVEL OF TRIGGER PULSE (%V DD)
Minimum Pulse Width for Triggering
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342
Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
1.0 PROPAGATION DELAY (ns) 3 VDD = 5V 750.0
500.0
TA = +125C TA = +25C
250.0 TA = -55C 0.0 0 10 20 30 40 LOWEST VOLTAGE OF TRIGGER PULSE (%VDD)
Propagation Delay vs Voltage Level of Trigger Pulse
6 NORMALIZED FREQUENCY (%) TA = +25C 4 RA = RB = 10k C = 0.1F 2
0
-2
-4 0 5 10 SUPPLY VOLTAGE (VDD) 15 20
Normalized Frequency Stability as a Function of Supply Voltage (Astable Mode)
4 NORMALIZED FREQUENCY (%) RA = RB = 1k C = 0.1F 2 VDD = 18V 0 VDD = 5V
-2 VDD = 2V -4 -5.0E1
-2.5E1
0.0
25.0
50.0
75.0
100.0
125.0
TEMPERATURE (C)
Normalized Frequency Stability as a Function of Temperature (Astable Mode)
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Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
100.0 (RA + 2RB) 10.0 CAPACITANCE ( F) 1.0 1k 0.1 10k 0.01 100k 1M 0.0001 10M 0.0 0.1 1.0 10 100 1k FREQUENCY (Hz) 10k 100k 1M 10M VDD = 5V TA = +25C
0.001
Free-Running Frequency as a Function of RA, RB, and C
100.0 10.0 CAPACITANCE ( F) 1.0 0.1 0.01 RA 10k 100k 1M 10M VDD = 5V TA = +25C 1k
0.001 0.0001 0.0 100ns 1s 10s 100s
1ms 10ms TIME DELAY
100ms
1s
10s
500 TA = +25C SUPPLY CURRENT (mA) 400 300 200 100 0 ICM7555 NE/SE555
Monostable Time Delay vs RA and C bipolar 555 device produces large crowbar currents in the output driver, it is necessary to decouple the power supply lines with a good capacitor close to the device. The 7555 device produces no such transients. See Figure 1. The ICM7555 produces supply current spikes of only 2-3mA instead of 300-400mA and supply decoupling is normally not necessary. Secondly, in most instances, the CONTROL VOLTAGE decoupling capacitors are not required since the input impedance of the CMOS comparators on chip are very high. Thus, for many applications, 2 capacitors can be saved using an ICM7555.
Power Supply Considerations
0 200 400 TIME (ns) 600 800
Figure 1. Supply Current Transient Compared With a Standard Bipolar 555 During an Output Transition
Although the supply current consumed by the ICM7555 device is very low, the total system supply can be high unless the timing components are high impedance. Therefore, high values for R and low values for C in Figures 2 and 3 are recommended.
Output Drive Capability
The output driver consists of a CMOS inverter capable of driving most logic families including CMOS and TTL. As such, if driving CMOS, the output swing at all supply voltages will equal the supply voltage. At a supply voltage of 4.5V or more, the ICM7555 will drive at least 2 standard TTL loads.
APPLICATION NOTES General
The ICM7555 device is, in most instances, a direct replacement for the NE/SE555 device. However, it is possible to effect economies in the external component count using the ICM7555. Because the
August 31, 1994
344
Philips Semiconductors Linear Products
Product specification
General purpose CMOS timer
ICM7555
Astable Operation
If the circuit is connected as shown in Figure 2, it will trigger itself and free run as a multivibrator. The external capacitor charges through RA and RB and discharges through RB only. Thus, the duty cycle (D) may be precisely set by the ratio of these two resistors. In this mode of operation, the capacitor charges and discharges between 1/3 VDD and 2/3 VDD. Since the charge rate and the threshold levels are directly proportional to the supply voltage, the frequency of oscillation is independent of the supply voltage. 1.38 F= (RA + 2RB) C D= RA + RB RA + 2RB
improved over the standard bipolar 555 in that it controls only the internal flip-flop, which in turn controls simultaneously the state of the OUTPUT and DISCHARGE pins. This avoids the multiple threshold problems sometimes encountered with slow falling edges in the bipolar devices.
V DD 1 RA OUTPUT GND DISHCARGE THRESHOLD CONTROL VOLTAGE 8 V DD
2 3
TRIGGER OUTPUT RESET
7 6
Monostable Operation
In this mode of operation, the timer functions as a one-shot. Initially, the external capacitor (C) is held discharged by a transistor inside the timer. Upon application of a negative pulse to Pin 2,TRIGGER, the internal flip-flop is set which releases the low impedance on DISCHARGE; the external capacitor charges and drives the OUTPUT High. The voltage across the capacitor increases exponentially with a time constant t = RAC. When the voltage across the capacitor equals 2/3 V+, the comparator resets the flip-flop, which in turn discharges the capacitor rapidly and also drives the OUTPUT to its low state. TRIGGER must return to a high state before the OUTPUT can return to a low state.
RB V DD
4
5
C
Figure 2. Astable Operation
V DD RA
1
8
Control Voltage
The CONTROL VOLTAGE terminal permits the two trip voltages for the THRESHOLD and TRIGGER internal comparators to be controlled. This provides the possibility of oscillation frequency modulation in the astable mode, or even inhibition of oscillation, depending on the applied voltage. In the monostable mode, delay times can be changed by varying the applied voltage to the CONTROL VOLTAGE pin.
2 3 TRIGGER OUTPUT RESET DISHCARGE THRESHOLD CONTROL VOLTAGE 7 6
4
5
RESET
The RESET terminal is designed to have essentially the same trip voltage as the standard bipolar 555, i.e., 0.6 to 0.7V. At all supply voltages it represents an extremely high input impedance. The mode of operation of the RESET function is, however, much
VDD < 18V t = 1.05 RA C Figure 3. Monostable Operation
OPTIONAL CAPACITOR
C
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