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 June 1996
NDH832P P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
-4.2A, -20V. RDS(ON) = 0.06 @ VGS = -4.5V RDS(ON) = 0.08 @ VGS = -2.7V. High density cell design for extremely low RDS(ON). Enhanced SuperSOTTM-8 small outline surface mount package with high power and current handling capability.
___________________________________________________________________________________________
5 6 7 8
4 3 2 1
Absolute Maximum Ratings
Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed PD
T A = 25C unless otherwise noted
NDH832P -20 -8
(Note 1a)
Units V V A
-4.2 -15
Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1c)
1.8 1 0.9 -55 to 150
W
TJ,TSTG
Operating and Storage Temperature Range
C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
70 20
C/W C/W
NDH832P Rev. B2
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -16 V, VGS = 0 V TJ = 55oC Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 8 V, VDS = 0 V VGS = -8 V, VDS= 0 V VDS = VGS, ID = -250 A TJ = 125oC Static Drain-Source On-Resistance VGS = -4.5 V, ID = -4.2 A TJ = 125oC VGS = -2.7 V, ID = -3.7 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = -4.5 V, VDS = -5 V VGS = -2.7 V, VDS = -5 V Forward Transconductance VDS = -10 V, ID = -4.2 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 1000 530 180 pF pF pF -15 -5 9 S -0.4 -0.3 -0.7 -0.5 0.045 0.063 0.064 -20 -1 -10 100 -100 V A A nA nA
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage -1 -0.8 0.06 0.12 0.08 A V
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -10 V, ID = -4.2 A, VGS = -4.5 V VDD = -5 V, ID = -1 A, VGEN = -4.5 V, RGEN = 6 13 53 60 33 18 1.2 6 20 70 80 40 30 ns ns ns ns nC nC nC
NDH832P Rev. B2
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max -1.5
(Note 2)
Units A V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.5 A -0.75
-1.2
PD (t) =
R JA(t)
T J-TA
=
R JC+RC (t ) A
T J-TA
= I 2 (t) x RDS(ON ) D
TJ
Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 70oC/W when mounted on a 1 in2 pad of 2oz cpper. b. 125oC/W when mounted on a 0.026 in2 pad of 2oz copper. c. 135oC/W when mounted on a 0.005 in2 pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDH832P Rev. B2
Typical Electrical Characteristics
-20
2
V
I D , DRAIN-SOURCE CURRENT (A)
GS
= -4.5V
-3.5 -3.0
-2.7 -2.5
R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE
1.8
-15
1.6
V GS = -2.5V -2.7
-10
1.4
-3.0 -3.5 -4.0 -4.5
-2.0
-5
1.2
-1.5
0 0 -1 V
DS
1
-5.0
-2 -3 , DRAIN-SOURCE VOLTAGE (V)
-4
0.8 0 -4 -8 -12 I D , DRAIN CURRENT (A) -16 -20
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate Voltage and Drain Current.
1.6
2
V G S = -4.5V
1.4
R DS(ON), NORMALIZED
V GS = -4.5V
R DS(on), NORMALIZED 1.2
DRAIN-SOURCE ON-RESISTANCE
DRAIN-SOURCE ON-RESISTANCE
I D = -4.2A
T J = 125C
1.5
1
25C
1
0.8
-55C
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
0.5 0 -4 I
D
-8 -12 , DRAIN CURRENT (A)
-16
-20
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Drain Current and Temperature.
-20
1.2
125C
V th , NORMALIZED
GATE-SOURCE THRESHOLD VOLTAGE
V DS = -10V
-16 I D, DRAIN CURRENT (A)
T = -55C J
25C
1.1
VDS = V GS I D = -250A
1
-12
0.9
-8
0.8
-4
0.7
0 0 -0.5 -1 -1.5 -2 -2.5 -3 VGS , GATE TO SOURCE VOLTAGE (V) -3.5 -4
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with Temperature.
NDH832P Rev. B2
Typical Electrical Characteristics
1.1 DRAIN-SOURCE BREAKDOWN VOLTAGE
I D = -250A
1.08 -I , REVERSE DRAIN CURRENT (A) 1.06 1.04 1.02 1 0.98 0.96 0.94 -50
20 10
VGS = 0V
2 1
BV DSS , NORMALIZED
T = 125C J
0.1
25C -55C
0.01
0.001
-25
0 T
J
25 50 75 100 , JUNCTION TEMPERATURE (C)
125
150
S
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD , BODY DIODE FORWARD VOLTAGE (V) 1.6
Figure 7. Breakdown Voltage Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation with Current and Temperature.
2500 2000
5
I D = -4.2A C iss
-V GS , GATE-SOURCE VOLTAGE (V) 4
V DS = -5.0V
-10V
-15V
1000 CAPACITANCE (pF)
C oss
500
3
2
300 200
f = 1 MHz V GS = 0 V
C rss
1
100 0.1
0.2
0.5
1
2
5
10
20
0 0 5 10 15 Q g , GATE CHARGE (nC) 20 25
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
20 , TRANSCONDUCTANCE (SIEMENS)
VDS = -10V TJ = -55C
15
25C 125C
10
5
g
FS
0 0 -4 ID -8 -12 -16 -20 , DRAIN CURRENT (A)
Figure 11. Transconductance Variation with Drain Current and Temperature.
NDH832P Rev. B2
Typical Thermal Characteristics
2.5 STEADY-STATE POWER DISSIPATION (W) -I D , STEADY-STATE DRAIN CURRENT (A)
5
2
1a
4.5
1a
4
1.5
3.5
1b 1c
1
1b 1c
3
4.5"x5" FR-4 Board
0.5
4.5"x5" FR-4 Board TA = 2 5 C
o
2.5
TA = 2 5 o C Still Air VG S = -4.5V
0 0
Still Air
0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 )
1
2 0
0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 )
1
Figure 12. SOT-8 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area.
30 10 -I D , DRAIN CURRENT (A) 3 1
RD N S(O IT
Figure 13. Maximum Steady-State Drain Current versus Copper Mounting Pad Area.
10 1m
10 10 0m
IM )L
0u
s
s
s
ms
0.3
V
0.1
GS
= -4.5V
1s 10 s DC
SINGLE PULSE R
J A
= See Note 1c
0.03 0.01 0.1
T A = 25C
0.2 0.5 1 2 5 10 20 30
- V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 14. Maximum Safe Operating Area.
1 TRANSIENT THERMAL RESISTANCE 0 .5 0 .3 0 .2 0 .1 0.05
0.02 0.2 0.1 0.05 D = 0.5
r(t), NORMALIZED EFFECTIVE
R JA (t) = r(t) * R JA R JA = See Note 1c
P(pk)
t1 TJ - T
t2
0.03 0.02 0.01 0 .0 0 0 1
0.01 Single Pulse
= P * R JA (t) A Duty Cycle, D = t 1 / t 2 0 .0 1 0 .1 t 1, TIME (sec) 1 10 100 300
0 .001
Figure 15. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.
NDH832P Rev. B2
NDH832P Rev. B2
NDH832P Rev. B2


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