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| FDS6898A OCTOBER 2001 FDS6898A Dual N-Channel Logic Level PWM Optimized PowerTrench(R) MOSFET General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Features * 9.4 A, 20 V RDS(ON) = 14 m @ VGS = 4.5 V RDS(ON) = 18 m @ VGS = 2.5 V * Low gate charge (16 nC typical) * High performance trench technology for extremely low RDS(ON) * High power and current handling capability D2 D D2 D DD1 D1 D 5 6 7 Q1 4 3 2 Q2 SO-8 Pin 1 SO-8 G2 S2 S G1 S1 G S 8 1 S Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA=25 C unless otherwise noted o Parameter Ratings 20 12 (Note 1a) Units V V A W 9.4 38 2 Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) 1.6 1 0.9 -55 to +150 C TJ, TSTG Operating and Storage Junction Temperature Range Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 C/W C/W Package Marking and Ordering Information Device Marking FDS6898A Device FDS6898A Reel Size 13'' Tape width 12mm Quantity 2500 units (c)2001 Fairchild Semiconductor Corporation FDS6898A Rev C (W) FDS6898A Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSSF IGSSR TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Gate-Body Leakage, Reverse (Note 2) Test Conditions VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25C VDS = 16 V, VGS = 12 V, VGS = 0 V VDS = 0 V Min 20 Typ Max Units V mV/C 1 100 -100 A nA nA Off Characteristics 21 VGS = -12 V, VDS = 0 V VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25C VGS = 4.5 V, ID = 9.4 A VGS = 2.5 V, ID = 8.3 A VGS = 4.5 V, ID = 9.4 A,TJ = 125C VGS = 4.5V, VDS = 5 V VDS = 5 V, ID = 9.4 A On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance 0.5 1 -3.5 10 13 14 1.5 V mV/C m 14 18 21 ID(on) gFS 19 47 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = 10 V, f = 1.0 MHz V GS = 0 V, 1821 440 208 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 10 V, VGS = 4.5 V, ID = 1 A, RGEN = 6 10 15 34 16 20 27 55 29 23 ns ns ns ns nC nC nC VDS = 10 V, VGS = 4.5 V ID = 9.4 A, 16 3 4 Drain-Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A (Note 2) 1.3 0.7 1.2 A V Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 78C/W when 2 mounted on a 0.5in pad of 2 oz copper b) 125C/W when mounted on a 0.02 2 in pad of 2 oz copper c) 135C/W when mounted on a minimum mounting pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied FDS6898A Rev C (W) FDS6898A Typical Characteristics 40 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 4.5V ID, DRAIN CURRENT (A) 3.0V 2.5V 30 2.2 2 VGS = 2.0V 1.8 1.6 1.4 1.2 1 0.8 0 0.5 1 1.5 2 0 10 20 I D, DRAIN CURRENT (A) 30 40 VDS, DRAIN-SOURCE VOLTAGE (V) 20 2.0V 2.5V 3.0V 4.0V 4.5V 10 0 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.038 RDS(ON) , ON-RESISTANCE (OHM) ID = 4.7A 0.03 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D = 9.4A VGS = 4.5V 1.4 1.2 0.022 TA = 125oC 0.014 TA = 25o C 0.006 1 0.8 0.6 -50 -25 0 25 50 75 100 o 125 150 1 2 3 4 5 TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 40 VDS = 5V ID, DRAIN CURRENT (A) 30 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 IS, REVERSE DRAIN CURRENT (A) TA = -55o C 25o C 125o C VGS = 0V 10 TA = 125oC 1 25o C 20 0.1 -55oC 0.01 0.001 0.0001 10 0 0.5 1 1.5 2 2.5 VGS, GATE TO SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6898A Rev C (W) Typical Characteristics 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 9.4A 8 CAPACITANCE (pF) 15V 6 VDS = 5V 10V 2500 f = 1MHz VGS = 0 V 2000 CISS 1500 4 1000 C OSS 2 500 CRSS 0 0 5 10 15 20 25 30 35 Q g, GATE CHARGE (nC) 0 0 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 100s 1ms 10ms 100ms 1s 10s DC VGS = 10V SINGLE PULSE RJA = 135o C/W TA = 25o C 0.01 0.01 P(pk), PEAK TRANSIENT POWER (W) 40 Figure 8. Capacitance Characteristics. SINGLE PULSE RJA =135C/W TA = 25C 30 1 20 0.1 10 0 0.1 1 10 100 0.001 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) t 1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 135 C/W 0.1 0.1 0.05 0.02 P(pk) t1 t2 SINGLE PULSE 0.01 0.01 TJ - TA = P * RJA(t) Duty Cycle, D = t 1 / t 2 0.001 0.0001 0.001 0.01 0.1 t , TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6898A Rev C (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM DISCLAIMER FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R) SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R) VCXTM STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4 |
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