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CD22204
Data Sheet February 1999 File Number
1696.4
5V Low Power Subscriber DTMF Receiver
The CD22204 complete dual tone multiple frequency (DTMF) receiver detects a selectable group of 12 or 16 standard digits. No front-end pre-filtering is needed. The only externally required components are an inexpensive 3.579545MHz TV ``colorburst'' crystal (for frequency reference) and a bias resistor. Extremely high system density is possible through the use of the Alternate Time Base (ATB) output of a crystal connected CD22204 receiver to drive the time bases of up to 10 additional receivers. This is a monolithic integrated circuit fabricated with low power, complementary symmetry CMOS processing. It only requires a single power supply. The CD22204 employs state-of-the-art ``switched-capacitor'' filter technology, resulting in approximately 40 poles of filtering and digital circuitry on the same CMOS chip. The analog input is preprocessed by 60Hz reject and bandsplitting filters and then zero-cross detected to provide AGC. Eight bandpass filters detect the individual tones. Digital processing is used to measure the tone and pause durations and provides the correctly coded and timed digital outputs. The outputs interface directly to standard CMOS circuitry and are threestate enabled to facilitate bus oriented architectures.
Features
* No Front End Band Splitting Filters Required * Single Low Tolerance 5V Supply * Three-State Outputs for Microprocessor Based Systems * Detects all 16 Standard DTMF Digits * Uses Inexpensive 3.579545MHz Crystal * Excellent Speech Immunity * Output in 4-Bit Hexadecimal Code * Excellent Latch-Up Immunity
Pinouts
CD22204 (PDIP) TOP VIEW
D2 1 D1 2 EN 3 VDD 4 NC 5 14 D4 13 D8 12 DV 11 ATB 10 XIN 9 XOUT 8 VSS
Ordering Information
PART NUMBER CD22204E TEMP. RANGE (oC) 0 to 70 PACKAGE 14 Ld PDIP PKG. NO. E14.3
XEN 6 ANALOG 7 IN
Functional Diagram
5 BANDSPLIT FILTER PREPROCESSOR/ LOW B/P FILTERS 12 DV 2 D1 DETECTORS AND SIGNALPROCESSING CIRCUITS HIGH B/P FILTERS 1 D2 14 D4 13 D8 3 EN VOLTAGE REG./REF. 4 VDD 8 VSS NC
ANALOG IN
7
11 ATB 6 XEN XIN 10 CLOCK GENERATOR CHIP CLOCKS
9 XOUT
NOTE: Pin numbers are for PDIP.
67
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
CD22204
Absolute Maximum Ratings (Note 1)
DC Supply Voltage (VDD) (Referenced to VSS Terminal) . . . . . . .7V Power Dissipation TA = 25oC (Derate above TA = 25oC at 6.25mW/oC . . . . . . . .65mW Input Voltage Range All Inputs Except Analog In . . . . . . . . . . . . . . (VDD 0.5V) to -0.5V Analog in Voltage Range . . . . . . . . . . . . . (VDD 0.5V) to (VDD -10V) DC Current into any Input or Output . . . . . . . . . . . . . . . . . . . . . .20mA
Thermal Information
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .175oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
PARAMETER Frequency Detect Bandwidth Amplitude for Detection
0oC TA 70oC, VDD = 5V 10% TEST CONDITIONS MIN (1.5 + 2Hz) Each Tone -32 (Note 3) -8 TYP 2.3 MAX 3.5 -2 % of fO dBm Referenced to 600 UNITS
Minimum Acceptable Twist
High Tone Twist = --------------------------Low Tone
-
+4
dB
60Hz Tolerance Dial Tone Tolerance "Precise" Dial Tone
-
-
0.8 0
VRMS dB Referenced to Lower Amplitude Tone Hits V V V V mA dB Referenced to Lowest Amplitude Tone
Talk Off Digital Outputs (except XOUT)
MITEL Tape #CM7291 "0" Level, 400A Load "1" Level, 200A Load
0 VDD -0.5 0 0.7VDD -
2 10 -
0.5 VDD 0.3VDD VDD 20 -12
Digital Inputs
"0" Level "1" Level
Supply Current Noise Tolerance
TA = 25oC MITEL Tape #CM7291 (Note 2) VDD VIN (VDD -10)
Input Impedance NOTES:
100k//15pF
300k
-
1. Unused inputs must be connected to VDD or VSS as appropriate. 2. Bandwidth limited (3kHz) Gaussian noise. 3. Lower minimum available, please contact sales office. (-32dBm = 19.45mVRMS, -2dBm = 0.615mVRMS)
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CD22204 Functional Block Diagram
BANDPASS FILTERS BAND SPLIT FILTERS BS1 ZERO CROSSING DETECTORS 697 770 852 941 BS2 1209 1336 ATB 11 XEN 6 1477 1633 DV 12 DATA STROBE CLOCK GENERATOR CHIP CLOCKS 2 D1 1M 1 D2 XOUT 9 POWER REGULATOR VOLTAGE REF OUTPUT DECODER OUTPUT REGISTER 14 D4 AMPLITUDE DETECTORS
ANALOG IN 7
PREPROCESSOR 60Hz REJECT PRE EMP
TIMING CIRCUITRY
10 XIN
/8
13 D8 DATA CLEAR 3 EN
4 VDD
8 VSS
NOTE: Pin numbers are for plastic DIP.
System Functions
Analog In The Analog In pin accepts the analog input. It is internally biased so that the input signal may be either AC or DC coupled, as long as it does not exceed the positive supply voltage. Proper input coupling is illustrated below.
CD22204E VDD
The CD22204 is designed to accept sinusoidal input waveforms, but will operate satisfactorily with any input that has the correct fundamental frequency with harmonics that are at least 20dB below the fundamental. Crystal Oscillator The CD22204 contains an on-board inverter with sufficient gain to provide oscillation when connected to a low cost television "color-burst" (3.579545MHz) crystal. The crystal oscillator is enabled by tying XEN high. The crystal is connected between XIN and XOUT. A 1M resistor is also connected between these pins in this mode. ATB is a clock frequency output. Other CD22204 devices may use the same frequency reference by tying their ATB pins to the ATB output of a crystal connected device. XIN and XEN of the auxiliary devices must then be tied high and low, respectively. Up to ten devices may be run from a single crystal connected CD22204 as shown in Figure 2.
0.01F AUDIO INPUT (+4dBm OR 1.22VRMS MAXIMUM)
270k
7
(ON CHIP)
10pF
1500pF
33k
ANALOG IN
>100k
VSS OPTIONAL HIGH FREQUENCY NOISE FILTER (fC = 3.9kHz)
FIGURE 1. ANALOG IN
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CD22204
3.579545MHz
DTMF Dialing Matrix
COL 0 1209Hz
XOUT VDD 9
1M XIN 10 ATB 11
COL 1 1336Hz 2 5 8 0
COL 2 1477Hz 3 6 9 #
COL 3 1633Hz A B C D
ROW 0 697Hz ROW 1 770Hz ROW 2 852Hz ROW 3 941Hz
1 4 7 *
CD22204
6
XEN
XIN CONNECTED TO VDD 10 11 CD22204 XEN 6
NOTE: Column 3 is for special applications and is not normally used in telephone dialing.
UP TO 10 DEVICES
Digital Inputs and Outputs All digital inputs and outputs of the DTMF receivers are represented by the schematic below. Only the "analog in" pin is different, and is described above. Care must be exercised not to exceed the voltage or current ratings on these pins as listed in the "maximum ratings" section.
VDD
FIGURE 2. CRYSTAL OSCILLATOR
Outputs D1, D2, D4, D8 and EN Outputs D1, D2, D4, D8 are CMOS push-pull when enabled (EN high) and open circuited (high impedance) when disabled by pulling EN low. These digital outputs provide the hexadecimal code corresponding to the detected digit. The digital outputs become valid after a tone pair has been detected and they are then cleared when a valid pause is timed. The table below describes the hexadecimal codes.
TABLE 1. OUTPUT CODES DIGIT 1 2 3 4 5 6 7 8 9 0 * # A B C D D8 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 D4 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 D2 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 D1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
DIGITAL INPUT
CMOS DIGITAL CIRCUITRY
DIGITAL OUTPUT
VSS
FIGURE 3. DIGITAL INPUTS AND OUTPUTS
Input Filter The CD22204 will tolerate total input noise of a maximum of 12dB below the lowest amplitude tone. For most telephone applications, the combination of the high frequency attenuation of the telephone line and internal band limiting make special circuitry at the input to these receivers unnecessary. However, noise near the 56kHz internal sampling frequency will be aliased (folded back) into the audio spectrum, so if excessive noise is present above 28kHz, the simple RC filter shown below may be used to band limit the incoming signal. The cut off frequency is 3.9kHz.
270k ANALOG IN
NOISY SIGNAL
CD22204
DV DV signals a detection by going high after a valid tone pair is sensed and decoded at the output pins D1, D2, D4, and D8. DV remains high until a valid pause occurs. N/C Pin This pin has no internal connection and should be left floating.
0.0015F
33k
FIGURE 4. FILTER FOR USE IN EXTREME HIGH FREQUENCY INPUT NOISE ENVIRONMENT
70
CD22204
Noise will also be reduced by placing a grounded trace around XIN and XOUT pins on the circuit board layout when using a crystal. It is important to note that XOUT is not intended to drive an additional device. XIN may be driven externally; in this case, leave XOUT floating.
PARAMETER Tone Time For Detection For Rejection Pause Time For Detection For Rejection
TONE BURST 1 tON tOFF PAUSE tR tD D1, D2 D4, D8 tSU tH
SYMBOL tON tON tOFF tOFF tD tR tSU tH -
MIN 40 40 25 35 7 4.2 -
TYP -
MAX 20 20 46 50
UNITS ms ms ms ms ms ms s ms ns ns ns ns
Timing Waveforms
Detect Time Release Time
TONE BURST 2
ANALOG INPUT
Data Setup Time Data Hold Time Output Enable Time CL = 50pF, RL = 1k Output Disable Time CL = 35pF, RL = 500 Output Rise Time CL = 50pF Output Fall Time CL = 50pF
200 150 200 160
5 300 200 300 250
DV
FIGURE 5.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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