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December 1996
NDH8301N Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package.
Features
3 A, 20 V. RDS(ON) = 0.06 @ VGS = 4.5 V RDS(ON) = 0.075 @ VGS = 2.7 V. Proprietary SuperSOTTM-8 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability.
____________________________________________________________________________________________
5
4 3 2
1
6
7 8
Absolute Maximum Ratings T A = 25C unless otherwise note
Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation Operating and Storage Temperature Range
(Note 1 ) (Note 1)
NDH8301N
20 8 3 15 0.8 -55 to 150
Units V V A
W C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1) (Note 1)
156 40
C/W C/W
(c) 1997 Fairchild Semiconductor Corporation
NDH8301N Rev.E
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 A VDS = 16 V, VGS = 0 V TJ = 55oC Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 8 V, VDS = 0 V VGS = -8 V, VDS= 0 V VDS = VGS, ID = 250 A TJ = 125oC Static Drain-Source On-Resistance VGS = 4.5 V, ID = 3 A TJ = 125oC VGS = 2.7 V, ID = 2.6 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = 4.5 V, VDS = 5 V VGS = 2.7 V, VDS = 5 V Forward Transconductance VDS = 5 V, ID = 3 A VDS = 10 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 415 220 85 pF pF pF 15 5 10 S 0.4 0.3 0.7 0.45 0.047 0.07 0.059 20 1 10 100 -100 V A A nA nA
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage 1 0.8 0.06 0.11 0.075 A V
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 10 V, ID = 3 A, VGS = 4.5 V VDD = 5 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 8 25 30 8 10 0.9 3.5 15 45 55 15 15 ns ns ns ns nC nC nC
NDH8301N Rev.E
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max 0.67
(Note 2)
Units A V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.67 A 0.7
1.2
PD (t) =
R J A (t)
T J-TA
=
R J C CA +R (t)
T J-TA
= I 2 (t) x RDS(ON ) D
TJ
Typical RJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: 156oC/W when mounted on a 0.0025 in2 pad of 2oz copper.
Scale 1 : 1 on letter size paper. 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDH8301N Rev.E
Typical Electrical Characteristics
15 I D , DRAIN-SOURCE CURRENT (A) 2
2.5
R DS(on), NORMALIZED
12
DRAIN-SOURCE ON-RESISTANCE
VGS =4.5V 3.0
2.7
1.75
VGS = 2.0V
2.0
9
1.5
2.5
1.25
6
2.7
3.0 3.5 4.5
3
1
0 0 0.5 V
DS
0.75 1 1.5 2 2.5 3 0 3 6 9 12 15 , DRAIN-SOURCE VOLTAGE (V) I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate Voltage and Drain Current.
1.8 RDS(ON) , NORMALIZED 1.6 1.4 1.2 1 0.8 0.6 0.4 -50
2
ID = 3A
R DS(on) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
DRAIN-SOURCE ON-RESISTANCE
VGS = 4.5V T = 125C J
1.5
V GS = 4.5V
1
25C
0.5
-55C
-25
0
25
50
75
100
125
150
0
0
3
6
9
12
15
TJ , JUNCTION TEMPERATURE (C)
I D , DRAIN CURRENT (A)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Drain Current and Temperature.
V DS = 5V
I , DRAIN CURRENT (A) 8
TJ = -55C
25C 125C
Vth , NORMALIZED
GATE-SOURCE THRESHOLD VOLTAGE
10
1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150
VDS = VGS I D = 250A
6
4
D
2
0 0 0.5 1 1.5 2 2.5 3 VGS , GATE TO SOURCE VOLTAGE (V)
TJ , JUNCTION TEMPERATURE (C)
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with Temperature.
NDH8301N Rev.E
Typical Electrical Characteristics
DRAIN-SOURCE BREAKDOWN VOLTAGE
10 5
1.15
ID = 250A
I , REVERSE DRAIN CURRENT (A)
VGS =0V
1
BV DSS , NORMALIZED
1.1
TJ = 125C
0 .1
1.05
25C -55C
1
0 .0 1
0.95
0 .0 0 1
0.9 -50
S
-25
0
25
50
75
100
125
150
0 .0 0 0 1 0 0 .2 0 .4 0.6 0 .8 1 V SD , BODY DIODE FORWARD VOLTAGE (V) 1 .2
T J , JUNCTION TEMPERATURE (C)
Figure 7. Breakdown Voltage Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation with Current and Temperature.
1200
5 , GATE-SOURCE VOLTAGE (V)
800 500 CAPACITANCE (pF) 300 200
I D = 3A
4
VDS = 5V 10 15V
Ciss Coss
3
2
100
Crss f = 1 MHz V GS = 0 V
40 0 .1
V
0 .5 1 3 5 , DRAIN TO SOURCE VOLTAGE (V) 10 20
0 .2 V
DS
GS
1
0 0 2 4 6 8 10 12 Q g , GATE CHARGE (nC)
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
VDD
t d(on)
t on tr
90%
t off t d(off)
90%
tf
V IN
D
RL V OUT
DUT
VGS
VOUT
R GEN
10%
10%
INVERTED
G
90% S
V IN
10%
50%
50%
PULSE WIDTH
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDH8301N Rev.E
Typical Electrical and Thermal Characteristics
gFS , TRANSCONDUCTANCE (SIEMENS) 20
40
V DS = 5V
16
T = -55C J
I , DRAIN CURRENT (A)
20 10 5
RD N S(O IM )L IT
10 1m
10 10
0u
s
s
25C
12
ms s
1 0.5
0m
8
125C
1s
V GS = 4.5V SINGLE PULSE
0.1
10 s DC
4
R J A = See Note 1
D
0.05
TA
= 25C
0 0 2 4 6 8 10 ID , DRAIN CURRENT (A)
0.01 0.1
0.2 V
0.5
DS
1 2 5 10 , DRAIN-SOURCE VOLTAGE (V)
20
30
Figure 13. Transconductance Variation with Drain Current and Temperature.
Figure 14. Maximum Safe Operating Area.
1
TRANSIENT THERMAL RESISTANCE
D = 0.5 0.2
r(t), NORMALIZED EFFECTIVE
R
0.1
0.1 0.05 0.02
(t) = r(t) * R JA JA R JA = See Notes 1
P(pk)
0.01
0.01
t1 TJ - T
t2
Single Pulse
= P * R JA (t) Duty Cycle, D = t1 / t2
A
0.001 0.0001
0.001
0.01
0.1
1 t , TIME (sec)
1
10
100
300
Figure 15. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1. Transient thermal response will change depending on the circuit board design.
NDH8301N Rev.E
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging Configuration: Figure 1.0
Customized Label
Packaging Description:
SSOT-8 parts are shipped in tape. The carrier tape is made from a di ssipat ive (carbo n filled) po ly carbon ate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film , adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped w ith 3,000 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 unit s per 7" or 177cm diameter reel. This and some other options are further described in the Packagin g Information table. These full reels are in di vidu ally barcod e labeled and placed inside a standard intermediate box (ill ustrated in figure 1.0) made of recyclable corrugated brow n paper. One box contains two reels maximum. And t hese boxes are placed ins ide a barcode labeled shipp ing bo x whic h comes in di fferent sizes depend in g on t he nu mber of parts shippe d.
F63TNR Label Anti static Cover Tape
Static Dissi pat ive Emboss ed Carrier Tape
F852 831N F852 831N F852 831N F852 831N F852 831N
Pin 1
SSOT-8 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard
(no f l ow c ode )
D84Z TNR 500 7" Dia 184x187x47 1,000 0.0416 0.0980
TNR 3,000 13" D ia 343x64x343 6,000 0.0416 0.5615
SSOT-8 Unit Orientation
343mm x 342mm x 64mm Intermediate box for Standar d and L99Z Opti ons
F63TNR Label
F63TNR Label
F63TNR Labe l sa mpl e 184mm x 187mm x 47mm Pizza Box fo r D84Z Option F63TNR Label
LOT: CBVK741B019 FSID: FDR835N QTY: 3000 SPEC:
SSOT-8 Tape Leader and Trailer Configuration: Figur e 2.0
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
(F63TNR)3
Carrier Tape Cover Tape
Components Traile r Tape 300mm mi nimum or 38 empty pockets Lead er Tape 500mm mi nimum or 62 empty poc kets
August 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape Configuration: Figur e 3.0
T E1 P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-8 (12mm)
A0
4.47 +/-0.10
B0
5.00 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.50 +/-0.10
E1
1.75 +/-0.10
E2
10.25 mi n
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
1.37 +/-0.10
T
0.280 +/-0.150
Wc
9.5 +/-0.025
Tc
0.06 +/-0.02
Notes : A0, B0, and K0 dimensions are deter mined with r espec t to t he EIA/Jedec RS-481 rotationa l and lateral movement requi remen ts (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Si de or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-8 Reel Configuration: Figur e 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
5.906 150 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOTTM-8 (FS PKG Code 34, 35)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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DISCLAIMER
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SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. D

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