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| March 1996 NDS8934 Dual P-Channel Enhancement Mode Field Effect Transistor General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features -3.8A, -20V. RDS(ON) = 0.07 @ VGS = -4.5V RDS(ON) = 0.1 @ VGS = -2.7V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. _________________________________________________________________________________ 5 4 3 2 1 6 7 8 Absolute Maximum Ratings Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current T A = 25C unless otherwise noted NDS8934 -20 -8 (Note 1a) Units V V A - Continuous - Pulsed -3.8 -15 2 PD Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) W 1.6 1 0.9 -55 to 150 C TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 C/W C/W (c) 1997 Fairchild Semiconductor Corporation NDS8934.SAM Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -16 V, VGS = 0 V VDS = -10 V, VGS = 0 V, TJ = 70C Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 8 V, VDS = 0 V VGS = -8 V, VDS= 0 V VDS = VGS, ID = -250 A TJ = 125C Static Drain-Source On-Resistance VGS = -4.5 V, ID = -3.8 A TJ = 125C VGS = -2.7 V, ID = -3.2 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = -4.5 V, VDS = -5 V VGS = -2.7 V, VDS = -5 V Forward Transconductance VDS = 10 V, ID = -3.8 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 1120 470 145 pF pF pF -15 -5 9 S -0.5 -0.3 -0.7 -0.5 0.06 0.085 0.082 -20 -1 -5 100 -100 V A A nA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage -1 -0.8 0.07 0.14 0.1 A V SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -10 V, ID = -3.8 A, VGS = -4.5 V VDD = -5 V, ID = -1 A, VGEN = -4.5 V, RGEN = 6 13 53 60 33 19 2.4 5.5 20 70 80 40 30 ns ns ns ns nC nC nC NDS8934.SAM Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A (Note 2) -1.3 -0.75 -1.2 A V PD (t) = R J A (t) T J -TA = R J C CA +R (t) T J -TA = I 2 (t) x RDS (ON ) D TJ Typical RJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 78oC/W when mounted on a 0.5 in2 pad of 2oz cpper. b. 125oC/W when mounted on a 0.02 in2 pad of 2oz cpper. c. 135oC/W when mounted on a 0.003 in2 pad of 2oz cpper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.. NDS8934.SAM Typical Electrical Characteristics -20 2 V I D , DRAIN-SOURCE CURRENT (A) -16 GS = -4.5V -3.5 DRAIN-SOURCE ON-RESISTANCE -3.0 R DS(on), NORMALIZED 1.8 -2.7 -12 1.6 VGS = -2.5V -2.7 -2.5 1.4 -3.0 -3.5 -4.0 -4.5 -5.0 -8 -2.0 -4 1.2 1 -1.5 0 0 -1 -2 -3 V DS , DRAIN-SOURCE VOLTAGE (V) -4 0.8 0 -4 I D -8 -12 -16 -20 , DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. 1.6 2 V G S = -4.5V 1.4 R DS(ON), NORMALIZED V GS = -4.5V R DS(on), NORMALIZED 1.2 DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE I D = -3.8A T J = 125C 1.5 1 25C 1 0.8 -55C 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 0.5 0 -4 I D -8 -12 , DRAIN CURRENT (A) -16 -20 Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Drain Current and Temperature. -20 1.2 125C V th , NORMALIZED GATE-SOURCE THRESHOLD VOLTAGE V DS = -10V -16 I D, DRAIN CURRENT (A) T = -55C J 25C 1.1 VDS = V GS I D = -250A 1 -12 0.9 -8 0.8 -4 0.7 0 0 -0.5 -1 -1.5 -2 -2.5 -3 VGS , GATE TO SOURCE VOLTAGE (V) -3.5 -4 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature. NDS8934.SAM Typical Electrical Characteristics 1.1 DRAIN-SOURCE BREAKDOWN VOLTAGE I D = -250A 1.08 -I , REVERSE DRAIN CURRENT (A) 1.06 1.04 1.02 1 0.98 0.96 0.94 -50 20 10 VGS = 0V 2 1 BV DSS , NORMALIZED T = 125C J 0.1 25C -55C 0.01 0.001 -25 0 T J 25 50 75 100 , JUNCTION TEMPERATURE (C) 125 150 S 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD , BODY DIODE FORWARD VOLTAGE (V) 1.6 Figure 7. Breakdown Voltage Variation with Temperature. Figure 8. Body Diode Forward Voltage Variation with Current and Temperature. 2000 1500 1000 CAPACITANCE (pF) 800 600 400 5 C iss -V GS , GATE-SOURCE VOLTAGE (V) 4 I D = -3.8A V DS = -5.0V -10V -15V C oss 3 2 200 f = 1 MHz V GS = 0 V C rss 1 100 0.1 0.2 0.5 1 2 3 5 10 20 0 0 5 10 15 Q g , GATE CHARGE (nC) 20 25 -V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics. 20 , TRANSCONDUCTANCE (SIEMENS) VDS = -10V TJ = -55C 15 25C 125C 10 5 g FS 0 0 -4 ID -8 -12 -16 -20 , DRAIN CURRENT (A) Figure 11. Transconductance Variation with Drain Current and Temperature. NDS8934.SAM Typical Thermal Characteristics 2.5 STEADY-STATE POWER DISSIPATION (W) -I D , STEADY-STATE DRAIN CURRENT (A) 4.5 2 Total Power for Dual Operation 4 1a 1a 3.5 1.5 Power for Single Operation 3 1b 1c 1 1b 1c 4.5"x5" FR-4 Board TA = 25 o C Still Air 2.5 4.5"x5" FR-4 Board TA = 2 5 o C Still Air VG S = -4.5V 0.5 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 2 0 0.1 0.2 0.3 0.4 2oz COPPER MOUNTING PAD AREA (in 2 ) 0.5 Figure 12. SO-8 Dual Package Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area. Figure 13. Maximum Steady-State Drain Current versus Copper Mounting Pad Area. 30 10 10 -I D , DRAIN CURRENT (A) 3 1 RD S(O LIM N) IT 0u 10 10 1m 0m s s s ms 1s 10 V GS 0.3 s = -4.5V DC 0.1 SINGLE PULSE R J A = See Note 1c 0.03 0.01 0.1 T A = 25C 0.2 0.5 1 2 5 10 20 30 - V DS , DRAIN-SOURCE VOLTAGE (V) Figure 14. Maximum Safe Operating Area. 1 0 .5 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk) 0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1 0 .0 0 5 0 .0 0 2 0 .0 0 1 0 .0001 R JA (t) = r(t) * R JA R JA = See Note 1c t1 TJ - T t2 = P * R JA (t) Duty Cycle, D = t 1 / t 2 A 0 .001 0 .0 1 0 .1 1 10 100 300 t 1 , TIME (sec) Figure 15. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDS8934.SAM |
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