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| TECHNICAL DATA IW4066B Quad Bilateral Switch High-Voltage Silicon-Gate CMOS The IW4066B is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. In addition, the on-state resistance is relatively constant over the full input-signal range. The IW4066B consists of four independent bilateral switches. A single control signal is required per switch. Both the p and the n device in a given switch are biased on or off simultaneously by the control signal.(As show in Fig.1.)The well of the n-channel device on each switch is either tied to the input when the switch is on or to GND when the switch is off. This configuration eliminates the variation of the switch-transistor threshold voltage with input signal, and thus keeps the on-state resistance low over the full operating-signal range. The advantages over single-channel switches include peak inputsignal voltage swings equal to the full supply voltage, and more constant on-state impedance over the input-signal range. * Operating Voltage Range: 3.0 to 18 V * Maximum input current of 1 A at 18 V over full packagetemperature range; 100 nA at 18 V and 25C * Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION IW4066BN Plastic IW4066BD SOIC TA = -55 to 125 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE On/Off Control Input L H State of Analog Switch Off On PIN 14 =VCC PIN 7 = GND 120 IW4066B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 10 750 500 100 -65 to +150 260 Unit V V V mA mW mW C C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 121 IW4066B DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High-Level Voltage ON/Off Control Inputs Minimum Low-Level Voltage ON/Off Control Inputs Maximum Input Leakage Current, ON/OFF Control Inputs Maximum Quiescent Supply Current (per Package) Maximum "ON" Resistance Test Conditions RON= Per Spec V 5.0 10 15 5.0 10 15 18 1 2 2 0.1 Guaranteed Limit -55C 25 C 3.5(Min) 7(Min) 11(Min) 1 2 2 0.1 1 2 2 1.0 125 C Unit V VIL RON = Per Spec V IIN VIN = VCC or GND A ICC VIN = VCC or GND 5.0 10 15 20 5.0 10 15 0.25 0.5 1 5 800 310 200 0.25 0.5 1 5 1050 400 240 7.5 15 30 150 1300 550 320 A RON VC= VCC RL=10 k returned V - GND to CC 2 VIS= GND to VCC VC= VCC RL=10 k RON Maximum Difference in "ON" Resistance Between Any Two Channels in the Same Package Maximum OffChannel Leakage Current, Any One Channel Maximum OnChannel Leakage Current, Any One Channel 5.0 10 15 - 15 10 5 - IOFF VC= 0 V VIS=18 V; VOS= 0 V VIS=0 V; VOS= 18V VC= 0 V VIS=18 V; VOS= 0 V VIS=0 V; VOS= 18V 18 0.1 0.1 1.0 A ION 18 0.1 0.1 1.0 A 122 IW4066B AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200k, Input tr=tf=20 ns) VCC Symbol tPLH, tPHL Parameter Maximum Propagation Delay, Analog Input to Analog Output (Figure 2) Maximum Propagation Delay, ON/OFF Control to Analog Output (Figure 3) Maximum Capacitance ON/OFF Control Input Control Input = GND Analog I/O Feedthrough V 5.0 10 15 5.0 10 15 15 7.5 0.6 40 20 15 70 40 30 Guaranteed Limit -55C 25C 40 20 15 70 40 30 125C 80 40 30 140 80 60 Unit ns tPLZ, tPHZ, tPZL, tPZH C ns pF ADDITIONAL APPLICATION CHARACTERISTICS(Voltages Referenced to GND Unless Noted) VCC Symbol THD BW Parameter Total Harmonic Distortion Test Conditions VC = VCC , GND = -5 V RL = 10 k, fIS =1 kHz sine wave V 5 5 Limit* 25C 0.4 40 Unit % MHz VC = VCC , GND = -5 V Maximum OnChannel Bandwidth or RL = 1 k Minimum Frequency Response VC = GND , VIS = 5 V Maximum OnChannel Bandwidth or RL = 1 k Minimum Frequency Response Maximum OnChannel Bandwidth or Minimum Frequency Response Cross talk (Control Input to Signal Output) Maximum Control Input Repetition Rate VC (A) = VCC = 5 V VC (B) = GND = -5 V VIS (A) = 5 VP - P ,50 source RL = 1 k VC= 10 V tr, tf = 20 ns RL = 10 k VIS= VCC, RL = 1 k CL = 50 pF VC= 10 V (square wave centered on 5 V) tr, tf = 20 ns, VOS= 1/2 VOS @1 kHz BW 10 1 MHz BW 5 8 MHz - 10 50 mV - 5 10 15 6 9 9.5 MHz * Guaranteed limits not tested. Determined by design and verified by qualification. 123 IW4066B Switch Input IIS (mA) VCC (V) 5 5 10 10 15 15 VIS (V) 0 5 0 10 0 15 -55 C 0.64 -0.64 1.6 -1.6 4.2 -4.2 +25 C 0.51 -0.51 1.3 -1.3 3.4 -3.4 +125 C 0.36 -0.36 0.9 -0.9 2.4 -2.4 Switch Output, VOS (V) Min 4.6 9.5 13.5 Max 0.4 0.5 1.5 - GND VIS VCC Figure 1. Schematic diagram of 1 of 4 identical switches and its associated control circuitry. 124 IW4066B Figure 2. Switching Waveforms Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM (1/4 of the Device) Control GND = L VCC = H Switch OFF ON 125 |
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