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| SM5852FS NIPPON PRECISION CIRCUITS INC. Digital Dynamic Bass Boost LSI OVERVIEW The SM5852FS is a digital signal processor IC that performs DDBB (digital dynamic bass boost) processing for use in digital audio reproduction equipment. It is designed for use with a 44.1 kHz sampling frequency. PINOUT LRCI BCKI DI CLK VSS RSTN TESTN MUTEN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DB/DS MOD2 MOD1 OPT VDD LRCO BCKO DOUT SM5852FS FEATURES s s s s s s s s s s 2-channel processing Improved DDBB mode channel separation 6 input-level dependent dynamic gain characteristics Serial input/output interface 2s complement, MSB first, 16-bit 384fs system clock 23 x 23-bit multiplier/30-bit high-precision accumulator TTL-compatible input/output 3.2 to 5.5 V operating voltage range 16-pin SOP Molybdenum-gate CMOS PACKAGE DIMENSIONS 16-pin SOP (Unit: mm) ORDERING INFOMATION 0.170.05 Device SM5852FS Package 16pin SOP 6.80.3 0 to 15 2.00.2 0.10.1 5.50.3 8.00.3 8.00.3 10.160.3 10.5 MAX 0.6350.15 1.270.15 0.40.15 NIPPON PRECISION CIRCUITS--1 SM5852FS BLOCK DIAGRAM LRCI BCKI DI Input data Interface DSP Block System Clock VDD VSS CLK RSTN TESTN Sequence Control Output data Interface LRCO BCKO DOUT MUTEN Mute Control DB/DS OPT MOD1 MOD2 Mode Control NIPPON PRECISION CIRCUITS--2 SM5852FS PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 12 13 Name LRCI BCKI DI CLK VSS RSTN TESTN MUTEN DOUT BCKO LRCO VDD OPT I/O1 Ip Ip Ip I - Ip Ip Ip O O O - Ip Input data sample rate (fs) clock input Bit clock input Serial data input Clock input Ground System reset initialization. Reset when LOW. Test mode input. Testing when LOW. Mute input. Muting when LOW. Serial data output Bit clock output Output data sample rate (fs) clock output 3.2 to 5.5 V supply Not used. Tie HIGH for normal operation. Gain characteristics switch inputs. 14 MOD1 Ip MOD1 LOW LOW 15 MOD2 Ip LOW LOW HIGH HIGH 16 DB/DS Ip HIGH HIGH MOD2 LOW LOW HIGH HIGH LOW LOW HIGH HIGH DB/DS LOW HIGH LOW HIGH LOW HIGH LOW HIGH Gain mode 18 dB 16 dB 14 dB 12 dB 10 dB 6 dB Off Off Description 1. Ip = Input pin with pull-up resistor. Accordingly, they can be left open for HIGH-level input. NIPPON PRECISION CIRCUITS--3 SM5852FS SPECIFICATIONS Absolute Maximum Ratings VSS = 0 V Parameter Supply voltage Input voltage Storage temperature Power dissipation Soldering temperature Soldering time Symbol VDD VIN Tstg PD Tsld tsld Condition Rating -0.3 to 7.0 VSS - 0.3 to VDD + 0.3 -55 to 125 250 255 10 Unit V V C mW C s Recommended Operating Conditions VSS = 0 V Parameter Supply voltage Operating temperature Symbol VDD Topr Condition Rating 3.2 to 5.5 -40 to 85 Unit V C NIPPON PRECISION CIRCUITS--4 SM5852FS Audio DC Characteristics VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -40 to 85 C for nomal-voltage operation Rating Parameter Current consumption1 Input voltage for all inputs2 Symbol IDD VIH VIL Output voltage for all outputs3 Input leakage current for all inputs2 CLK input leakage current Input current for all inputs except CLK 2 1. 2. 3. VOH VOL ILH ILL IIL IOH = -0.4 mA IOL = 1.6 mA VIN = VDD VIN = 0 V VIN = 0 V Condition min VDD = 5.0 V - 2.4 - 2.5 - - - - typ 16 - - - - - - - max 23 - 0.5 - 0.4 1.0 1.0 20 mA V V V V A A A Unit fCLK = 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS, CKL LRCO, BCKO, DOUT VDD = 3.2 to 4.5 V, VSS = 0 V, Ta = -20 to 70 C for low-voltage operation Rating Parameter Current consumption1 Input voltage for all inputs2 Symbol IDD VIH VIL Output voltage for all outputs3 Input leakage current for all inputs2 CLK input leakage current Input current for all inputs except CLK 2 1. 2. 3. VOH VOL ILH ILL IIL IOH = -0.2 mA IOL = 0.8 mA VIN = VDD VIN = 0 V VIN = 0 V Condition min VDD = 3.4 V - 2.4 - 2.5 - - - - typ 7 - - - - - - - max 10 - 0.5 - 0.4 1.0 1.0 12 mA V V V V A A A Unit fCLK = 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS, CLK LRCO, BCKO, DOUT NIPPON PRECISION CIRCUITS--5 SM5852FS AC Characteristics VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -40 to 85 C for nomal-voltage operation VDD = 3.2 to 4.5 V, VSS = 0 V, Ta = -20 to 70 C for low-voltage operation CLK (384fs) Rating Parameter Clock pulsewidth Clock cycle time Symbol tCW tCY Condition min 24 55 typ - 59 max 500 1000 ns ns Unit tcy CLK VIH 1.5V tCW RSTN tCW VIL Rating Parameter Symbol Condition min At power-ON Reset LOW-level pulsewidth tRST At all other times 1 50 typ - - max - 1000 s ns Unit VDD VDD 3.2V 3.2V tRST tRST 1sec 1sec tRST tRST RSTN RSTN 1.5V 1.5V RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 s, a through-current flows in the internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON. NIPPON PRECISION CIRCUITS--6 SM5852FS Serial input timing Rating Parameter BCKI pulsewidth BCKI cycle time DI setup time DI hold time LRCI setup time LRCI hold time Symbol tBCIW tBCIY tDIS tDIH tLIS tLIH Condition min 100 200 75 75 75 75 typ - - - - - - max - - - - - - ns ns ns ns ns ns Unit BCKI 1.5V tBCIW tBCIY DI tBCIW 1.5V tDIS LRCI tDIH 1.5V tLIS tLIH DB/DS, OPT Rating Parameter Minimum pulsewidth Symbol tW Condition min 2/fs typ - max - ns Unit When DB/DS or OPT change state, the input level must be constant for a minimum of 2/fs (2 x LRCI cycle time). Input levels of duration less than 2/fs may be ignored. NIPPON PRECISION CIRCUITS--7 SM5852FS Serial output timing Rating Parameter BCKO pulsewidth BCKO cycle time DOUT, LRCO output delay time Symbol tBCOW tBCOY tDHL tDLH Condition min 15 pF load 15 pF load 15 pF load 15 pF load 180 400 -20 -20 typ 1/96fs 1/48fs - - max - - 60 60 ns ns ns ns Unit BCKO 1.5V tBCOW tBCOY DOUT LRCO tBCOW 1.5V tDHL tDLH NIPPON PRECISION CIRCUITS--8 SM5852FS Low-pass Gain Characteristics 20 10 0 -10 -20 18dB 16dB 14dB 12dB GAIN (dB) -30 -40 -50 -60 -70 -80 1.0 OFF 6dB 10dB 2.0 5.0 10 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) DDBB Mode Filter Characteristics 0 -10 -20 Ooutput (dB) -30 -40 -50 -60 -70 -80 -90 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 Input (dB) 18dB 16dB 14dB 12dB 10dB 6dB OFF NIPPON PRECISION CIRCUITS--9 SM5852FS FUNCTIONAL DESCRIPTION DDBB (Digital Dynamic Bass Boost) The DDBB function emphasizes the low-frequency components of the input signal by picking out the low-frequency components and passing them through a DDBB 3rd-order IIR low-pass filter and then changing the gain for the low-frequency components. Two independent DDBB filters are used, one for each the left and right channels, to maintain full channel separation. The DDBB boost is determined by DB/DS, MOD1 and MOD2. MOD1 LOW LOW LOW LOW HIGH HIGH HIGH HIGH MOD2 LOW LOW HIGH HIGH LOW LOW HIGH HIGH DB/DS LOW HIGH LOW HIGH LOW HIGH LOW HIGH Gain mode 18 dB 16 dB 14 dB 12 dB 10 dB 6 dB Off Off DB/DS Switching Shock Noise The soft muting function is also activated to eliminate switching shock noise when DB/DS changes state. When DB/DS changes state, the attenuation changes to - dB, the internal circuit settings are activated and then soft muting is released. Therefore, a maximum time of approximately 46.4 ms is required to change the compression mode. Of course, if the attenuation is already - dB after soft muting using MUTEN, then no time is required to change compression mode. Reset Initialization RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 s, a through-current flows in the LSI's internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON. When RSTN goes from LOW to HIGH, initialization hold is released and the initialization routine first resets the internal data over an interval of 4fs. During the initialization routine, the output data is forcibly muted so that there is no output signal. Soft Muting Soft muting is active when MUTEN is LOW. When MUTEN is LOW, the attenuation changes smoothly from 0 to - dB in 1024/fs, or approximately 23.2 ms. When MUTEN goes HIGH, soft muting is released and the attenuation changes smoothly from - to 0 dB, again taking approximately 23.2 ms. Also, if a MUTEN transition occurs while the attenuation is changing, the attenuation then changes smoothly in the direction specified by the new level of MUTEN. NIPPON PRECISION CIRCUITS--10 SM5852FS INPUT/OUTPUT TIMING Input Timing LRCO BCKO MSB Lch LSB MSB Rch LSB DOUT There must be a minimum of 16 BCKI clock cycles to read in a single word of data. Data on DI is input in sync with the falling edge of BCKI in 16-bit serial, MSB first, 2s complement format. Output Timing LRCO BCKO DOUT , , MSB Lch LSB ,, ,, MSB Rch LSB ,, ,, Shaded areas represent intervals of invalid data. NIPPON PRECISION CIRCUITS--11 SM5852FS APPLICATON CIRCUIT X'tal(16.9344 MHz) XTI XTAI LRCK BCKI SONY CXD1125 1130 1135 MOD1 C210 DI DATA CLK OPT LRCI DB/DS MOD2 CKO XTO SM5852FS SM5841 RSTN TESTN MUTEN PSSL SLOB LRCO BCKO DOUT LRCI BCKI DIN Microcontroller NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2 chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9623BE 1998.08 NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS--12 |
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