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19-3032; Rev 0; 10/03
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers
General Description
The MAX5930/MAX5931 +1V to +13.2V triple hot-swap controllers provide complete protection for multisupply systems. They allow the safe insertion and removal of circuit cards into live backplanes. These devices hot swap multiple supplies ranging from +1V to +13.2V, provided one supply is at or above +2.7V and only one supply is above 11V. The input voltage rails (channels) can be configured to sequentially turn-on/off, track each other, or have completely independent operation. The discharged filter capacitors of the circuit card provide low impedance to the live backplane. High inrush currents from the backplane to the circuit card can burn up connectors and components, or momentarily collapse the backplane power supply leading to a system reset. The MAX5930/MAX5931 hot-swap controllers prevent such problems by gradually ramping up the output voltage and regulating the current to a preset limit when the board is plugged in, allowing the system to stabilize safely. After the startup cycle is complete, on-chip comparators provide VariableSpeed/BiLevelTM protection against short-circuit and overcurrent faults, and provide immunity against system noise and load transients. The load is disconnected in the event of a fault condition. The MAX5930/MAX5931 fault-management mode is selectable, allowing latched fault or autoretry after a fault condition. The MAX5930/MAX5931 offer a variety of options to reduce external component count and design time. All devices integrate an on-board charge pump to drive the gates of low-cost, external N-channel MOSFETs, an adjustable startup timer, and an adjustable current limit. The devices offer integrated features like startup current regulation and current glitch protection to eliminate external timing resistors and capacitors. The MAX5931L provides an open-drain, active-low status output for each channel, the MAX5931H provides an open-drain, active-high status output for each channel, and the MAX5930 status output polarity is selectable. The MAX5930 is available in a 24-pin QSOP package, and the MAX5931 is available in a 20-pin QSOP package. All devices are specified over the extended -40C to +85C temperature range.
Features
Safe Hot Swap for +1V to +13.2V Power Supplies with Any Input Voltage (VIN_) 2.7V and Only One VIN_ > 11.0V Adjustable Circuit Breaker/Current-Limit Threshold from 25mV to 100mV Configurable Tracking, Sequencing, or Independent Operation Modes VariableSpeed/BiLevel Circuit-Breaker Response Internal Charge Pumps Generate N-Channel MOSFET Gate Drives Inrush Current Regulated at Startup Autoretry or Latched Fault Management Programmable Undervoltage Lockout Status Outputs Indicate Fault/Safe Condition
MAX5930/MAX5931
Ordering Information
PART MAX5930EEG MAX5931LEEP* MAX5931HEEP* TEMP RANGE -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 24 QSOP 20 QSOP 20 QSOP
*Future product--contact factory for availability. Selector Guide and Typical Operating Circuit appear at end of data sheet.
Pin Configurations
TOP VIEW
POL 1 ON2 2 ON1 3 LIM1 4 IN1 5 SENSE1 6 GATE1 7 STAT1 8 STAT2 9 TIM 10 LATCH 11 STAT3 12 24 MODE 23 ON3 22 LIM2 21 IN2
MAX5930
20 SENSE2 19 GATE2 18 LIM3 17 IN3 16 SENSE3 15 GATE3 14 GND 13 BIAS
Applications
Network Switches, Routers, Hubs Hot Plug-In Daughter Cards RAID Solid-State Circuit Breakers Power-Supply Sequencing/Tracking Base-Station Line Cards Portable Computer Device Bays (Docking Stations)
QSOP
Pin Configurations continued at end of data sheet. VariableSpeed/BiLevel is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
1
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.) IN_ ..........................................................................-0.3V to +14V GATE_.............................................................-0.3V to (IN_ + 6V) BIAS (Note 1) .............................................. (VIN - 0.3V) to +14V ON_, STAT_, LIM_ (MAX5930), TIM, MODE, LATCH, POL (MAX5930) ..........................-0.3V to (VIN + 0.3V) SENSE_........................................................-0.3V to (IN_ + 0.3V) Current into Any Pin..........................................................50mA Note 1: VIN is the largest of VIN1, VIN2, and VIN3.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Continuous Power Dissipation (TA = +70C) 20-Pin QSOP (derate 9.1mW/C above +70C)............727mW 24-Pin QSOP (derate 9.5mW/C above +70C)............762mW Operating Temperature Range ...........................-40C to +85C Junction Temperature .....................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
ELECTRICAL CHARACTERISTICS
(VIN_ = +1V to +13.2V provided at least one supply is larger than or equal to +2.7V and only one supply is > 11.0V, TA = -40C to +85C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VON_ = +3.3V, and TA = +25C.) (Notes 1, 2)
PARAMETER POWER SUPPLIES IN_ Input Voltage Range Supply Current CURRENT CONTROL LIM_ = GND (MAX5930), MAX5931 (Note 4) TA = +25C TA = -40C to +85C 22.5 21.0 80 RLIM_ x 7.5 x 10-6 + 25mV 3 130 2x VSC,TH 10mV overdrive, from overload condition VSENSE_ = VIN_ RTIM = 100k Startup Period (Note 5) tSTART RTIM = 4k (minimum value) TIM floating (default) 8.0 0.30 5 200 0.03 10.8 0.4 9 1 13.6 0.55 14 ms ms s mV ns A 25 27.5 27.5 125 VIN_ IQ At least one VIN_ +2.7V and only one VIN_ > 11.0V IIN1 + IIN2 + IIN3, VON_ = 2.7V, VIN_ = +13.2V, after STAT_ high 1.0 2.5 13.2 5 V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
Slow-Comparator Threshold (VIN_ - VSENSE_) (Note 3)
VSC,TH
mV
RLIM_ = 10k (MAX5930) RLIM_ from LIM_ to GND (MAX5930)
Slow-Comparator Response Time (Note 4) Fast-Comparator Threshold (VIN_ - VSENSE_) Fast-Comparator Response Time SENSE_ Input Bias Current MOSFET DRIVER
tSCD VFC,TH tFCD IB SENSE_
1mV overdrive 50mV overdrive
2
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +13.2V provided at least one supply is larger than or equal to +2.7V and only one supply is > 11.0V, TA = -40C to +85C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VON_ = +3.3V, and TA = +25C.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS Charging, VGATE_ = GND, VIN_ = +5V (Note 6) Discharging, during startup Average Gate Current IGATE Discharging, normal turn-off or triggered by the slow comparator after startup; VGATE_ = 5V, VIN_ = 10V, VON_ = 0V Discharging, triggered by a fault after startup; VGATE_ = 5V, VIN_ = 10V, (VIN_ VSENSE_) > VFC,TH_ (Note 7) Gate-Drive Voltage ON COMPARATOR ON_ Threshold ON_ Propagation Delay ON_ Voltage Range ON_ Input Bias Current ON_ Pulse-Width Low DIGITAL OUTPUTS (STAT_) Output Leakage Current Output Voltage Low UNDERVOLTAGE LOCKOUT (UVLO) UVLO Threshold UVLO Hysteresis UVLO Glitch Filter Reset Time UVLO to Startup Delay Input Power-Ready Threshold Input Power-Ready Hysteresis LOGIC AND TIMING POL Input Pullup LATCH Input Pullup MODE Input Voltage Independent-Mode Selection Threshold Tracking-Mode Selection Threshold IPOL ILATCH VMODE VINDEP,TH VTRACK,TH POL = GND (MAX5930) LATCH = GND MODE floating (default to sequencing mode) VMODE rising VMODE rising 2.7 2 2 1.0 4 4 1.25 6 6 1.5 0.4 A A V V V VUVLO VUVLO,HYST tD,GF tD,UVLO VPWRRDY VPWRHYST VIN < VUVLO maximum pulse width to reset Time input voltage must exceed VUVLO before startup is initiated Any channel, while VIN > VUVLO (Note 9) 20 0.9 37.5 0.95 50 Startup is initiated when this threshold is reached by any VIN_ and VON_ > 0.9V (Note 8) 2.25 2.45 250 10 60 1.0 2.65 V mV s ms V mV VOL_ VSTAT_ 13.2V POL = floating (MAX5930), ISINK = 1mA 1 0.4 A V VON_ IBON tUNLATCH VON_,TH Low to high Hysteresis 10mV overdrive Without false output inversion VON_ = VIN To unlatch after a latched fault 100 0.03 0.85 0.875 25 10 VIN 1 0.90 V mV s V A s VDRIVE VGATE_ - VIN_, IGATE_ = 1A 2 MIN 80 TYP 100 100 3 7 mA 30 4.9 50 5.3 120 5.6 V MAX 125 UNITS A
MAX5930/MAX5931
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +13.2V provided at least one supply is larger than or equal to +2.7V and only one supply is > 11.0V, TA = -40C to +85C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VON_ = +3.3V, and TA = +25C.) (Notes 1, 2)
PARAMETER MODE Input Impedance Autoretry Delay SYMBOL RMODE tRETRY Delay time to restart after fault shutdown CONDITIONS MIN TYP 200 64 x tSTART MAX UNITS k ms
Note 2: All devices are 100% tested at TA = +25C. Limits over temperature are guaranteed by design. Note 3: The slow-comparator threshold is adjustable. VSC,TH = RLIM x 7.5A + 25mV (see the Typical Operating Characteristics). Note 4: The current-limit slow-comparator response time is weighed against the amount of overcurrent, the higher the overcurrent condition, the faster the response time (see the Typical Operating Characteristics). Note 5: The startup period (tSTART) is the time during which the slow comparator is ignored and the device acts as a current-limiter by regulating the sense current with the fast comparator (see the Startup Period section). Note 6: The current available at GATE is a function of VGATE (see the Typical Operating Characteristics). Note 7: After a fault triggered by the fast comparator, the gate is discharged by the strong discharge current. Note 8: Each channel input while the other inputs are at +1V. Note 9: Each channel input while any other input is at +2.7V.
Typical Operating Characteristics
(Typical Operating Circuits, Q1 = Q2 = Q3 = Fairchild FDB7090L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA = +25C, unless otherwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3 are referred to as X, Y, and Z.)
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX5930 toc01
TOTAL SUPPLY CURRENT vs. INPUT VOLTAGE
MAX5930 toc02
SUPPLY CURRENT vs. TEMPERATURE
VON_ = VINY = VINZ = 2.7V VINX = 2.8V IINY + IINZ
MAX5930 toc03
4
VINY = VINZ = 2.7V IINX + IINY + IINZ
5.0
3
IIN = IIN1 + IIN2 + IIN3 VIN = VINX = VINY = VINZ VON = VON1 = VON2 = VON3
3.0 2.5 2.0
4.0 IIN (mA) VON = 0V 3.0 VON = 3.3V IIN (mA)
IIN (mA)
2
IINX
1.5 1.0 0.5
IINX
1 IINY + IINZ 0 0 2 4 6 8 VINX (V) 10 12 14
2.0 IINY + IINZ
1.0 2 4 6 8 VIN (V) 10 12 14
0 -40 -15 10 35 60 85 TEMPERATURE (C)
4
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Q3 = Fairchild FDB7090L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA = +25C, unless otherwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3 are referred to as X, Y, and Z.)
GATE-DRIVE VOLTAGE vs. INPUT VOLTAGE
MAX5930 toc04
GATE CHARGE CURRENT vs. GATE VOLTAGE
MAX5930 toc05
GATE CHARGE CURRENT vs. TEMPERATURE
VINX = 13.2V GATE CHARGE CURRENT (A) 160
MAX5930 toc06
8
VINY = VINZ = 2.7V
150
VONW = VINY = VINZ = 2.7V VINX = 13.2V VINX = 5V
200
6 VDRIVEX (V)
GATE CHARGE CURRENT (A)
120
90
120 VINX = 5V 80 VINX = 1V VONX = VINY = VINZ = 2.7V VGATEX = 0V 0
4
60 VINX = 1V 30
2
40
0 0 2 4 6 8 10 12 14 VINX (V)
0 0 5 10 VGATEX (V) 15 20
-40
-15
10
35
60
85
TEMPERATURE (C)
STRONG GATE DISCHARGE CURRENT vs. GATE VOLTAGE
MAX5930 toc07
STRONG GATE DISCHARGE CURRENT vs. TEMPERATURE
MAX5930 toc08
TURN-OFF TIME vs. SENSE VOLTAGE
RLIMX = 100
MAX5930 toc09
6 GATE DISCHARGE CURRENT (mA) 5 4 3 2 1 0 0
VONX = 0V VINY = VINZ = 2.7V VINX = 13.2V
6 GATE DISCHARGE CURRENT (mA) 5 4 3 VINX = 3.3V 2 1 0 VINX = 5V
VONX = 0V VINY = VINZ = 2.7V VINX = 13.2V
10
1 TURN-OFF TIME (ms)
0.1 SLOW-COMPARATOR THRESHOLD FAST-COMPARATOR THRESHOLD
VINX = 5V VINX = 3.3V
0.01
0.001 VINX = 1V 0.0001 -40 -15 10 35 60 85 0 25 50
VINX = 1V 4 8 12 16 20 75 100 125
VGATEX (V)
TEMPERATURE (C)
VINX - VSENSEX (mV)
TURN-OFF TIME vs. SENSE VOLTAGE (EXPANDED SCALE)
RLIMX = 100
MAX5930 toc10
SLOW-COMPARATOR THRESHOLD vs. RLIMX
MAX5930 toc11
STARTUP PERIOD vs. RTIM
MAX5930 toc12
10
120 100 80 VSC,TH (mV)
60
TURN-OFF TIME (ms)
40 tSTART (ms) 20 0 0 2 4 6 8 10 0 100 RLIMX (k) 200 300 RTIM (k) 400 500
1
60 40 20
SLOW-COMPARATOR THRESHOLD 0.1 20 25 30 35 40 45 50 VINX - VSENSEX (mV) 0
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Q3 = Fairchild FDB7090L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA = +25C, unless otherwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3 are referred to as X, Y, and Z.)
TURN-OFF TIME SLOW-COMPARATOR FAULT
MAX5930 toc13
TURN-OFF TIME FAST-COMPARATOR FAULT
MAX5930 toc14
VSTATX 2V/div 0V VINX - VSENSEX 25mV/div AC-COUPLED VGATEX 5V/div 0V
VSTATX 2V/div 0V VINX - VSENSEX 100mV/div 0V VGATEX 5V/div 0V 1ms/div
100ns/div
STARTUP WAVEFORMS FAST TURN-ON (CGATE = 0nF, CBOARD = 1000F)
MAX5930 toc15
STARTUP WAVEFORMS SLOW TURN-ON (CGATE = 0.22F, CBOARD = 1000F)
MAX5930 toc16
VONX 5V/div VSTATX 5V/div IOUTX 2A/div VGATEX 10V/div VOUTX 5V/div
VON 5V/div VSTATX 5V/div IOUTX 2A/div VGATEX 10V/div VOUTX 5V/div
2ms/div
2ms/div
AUTORETRY DELAY
MAX5930 toc17
TURN-ON IN VOLTAGE-TRACKING MODE
VINX 2V/div 0V VONX 2V/div VGATEY VPWRRDY
MAX5930 toc18
VGATEX 2V/div 0V VOUTX 2V/div 0V IOUTX 500mA/div 0V 100ms/div
5V/div 0V 4ms/div
VGATEX
6
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Q3 = Fairchild FDB7090L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA = +25C, unless otherwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3 are referred to as X, Y, and Z.)
TURN-OFF IN XXXX VOLTAGE-TRACKING MODE
MAX5930 toc19
TURN-ON IN XXXX POWER-SEQUENCING MODE
VINX 2V/div 0V VONX 2V/div 0V VPWRRDY
MAX5930 toc20
VINX 2V/div 0V VONX 2V/div VGATEY
VPWRRDY
5V/div 0V
VGATEX
5V/div 0V 4ms/div
VGATEY VGATEX
4ms/div
TURN-OFF IN XXXX POWER-SEQUENCING MODE
MAX5930 toc21
TURN-ON IN XXXX INDEPENDENT MODE
VINX 2V/div 0V VONX 2V/div VGATEY
MAX5930 toc22
VINX 2V/div 0V VONX 2V/div 0V
VPWRRDY
VGATEY 5V/div 0V VGATEX 5V/div 0V VGATEX
4ms/div
4ms/div
TURN-OFF IN XXXX INDEPENDENT MODE
MAX5930 toc23
STRONG GATE DISCHARGE CURRENT vs. OVERDRIVE
VONX = VIN VGATE = 5V AFTER STARTUP LIM_ = GND VINX = 12V VINX = 5V
MAX5930 toc24
50 GATE DISCHARGE CURRENT (mA)
VINX 2V/div 0V VONX 2V/div
VPWRRDY
40
30
VGATEY 5V/div
20
VINX = 2.7V
VGATEX
10
0V 0 4ms/div 20 25 30 35 40 45 50 VIN_ - VSENSE_ (mV)
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Pin Description
PIN MAX5930 1 2 3 4 5 6 7 8 MAX5931 -- 1 2 -- 3 4 5 6 NAME POL ON2 ON1 LIM1 IN1 SENSE1 GATE1 STAT1 FUNCTION STAT Output-Polarity Select (See Table 3 and the Status Output Section) On/Off Channel 2 Control Input (See the Mode Section) On/Off Channel 1 Control Input (See the Mode Section) Channel 1 Current-Limit Setting. Connect a resistor from LIM1 to GND to set current-trip level. Connect to GND for the default 25mV threshold. Do not leave LIM1 open. Channel 1 Supply Input. Connect to a 1V to 13.2V supply voltage and to one end of RSENSE1. Bypass with a 0.1F capacitor to ground. Channel 1 Current-Sense Input. Connect SENSE1 to the drain of an external MOSFET and to one end of RSENSE1. Channel 1 Gate-Drive Output. Connect to gate of external N-channel MOSFET. Open-Drain Status Signal for Channel 1. STAT1 asserts when hot swap is successful and tSTART has elapsed. STAT1 deasserts if ON1 is low, or if channel 1 is turned off for any fault condition. Open-Drain Status Signal for Channel 2. STAT2 asserts when hot swap is successful and tSTART has elapsed. STAT2 deasserts if ON2 is low, or if channel 2 is turned off for any fault condition. Startup Timer Setting. Connect a resistor from TIM to GND to set the startup period. Leave TIM unconnected for the default startup period of 9ms. RTIM must be between 4k and 500k. Latch/Autoretry Selection Input. Connect LATCH to GND for autoretry mode after a fault. Leave LATCH open for latch mode. Open-Drain Status Signal for Channel 3. STAT3 asserts when hot swap is successful and tSTART has elapsed. STAT3 deasserts if ON3 is low, or if channel 3 is turned off for any fault condition. Supply Reference Output. The highest supply is available at BIAS for filtering. Connect a 1nF to 10nF ceramic capacitor from BIAS to GND. No other connections are allowed to BIAS. Ground Channel 3 Gate-Drive Output. Connect to gate of external N-channel MOSFET. Channel 3 Current-Sense Input. Connect SENSE3 to the drain of an external MOSFET and to one end of RSENSE3. Channel 3 Supply Input. Connect to a supply voltage from 1V to 13.2V and to one end of RSENSE3. Bypass with a 0.1F capacitor to ground. Channel 3 Current-Limit Setting. Connect a resistor from LIM3 to GND to set current-trip level. Connect to GND for the default 25mV threshold. Do not leave LIM3 open. Channel 2 Gate-Drive Output. Connect to gate of external N-channel MOSFET. Channel 2 Current-Sense Input. Connect SENSE2 to the drain of an external MOSFET and to one end of RSENSE2. Channel 2 Supply Input. Connect to a 1V to 13.2V supply voltage and to one end of RSENSE2. Bypass with a 0.1F capacitor to ground.
9
7
STAT2
10
8
TIM
11
9
LATCH
12
10
STAT3
13 14 15 16 17 18 19 20 21
11 12 13 14 15 -- 16 17 18
BIAS GND GATE3 SENSE3 IN3 LIM3 GATE2 SENSE2 IN2
8
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Pin Description (continued)
PIN MAX5930 22 23 24 MAX5931 -- 19 20 NAME LIM2 ON3 MODE FUNCTION Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set current-trip level. Connect to GND for the default 25mV threshold. Do not leave LIM2 open. On/Off Channel 3 Control Input (See the Mode Section) Mode Configuration Input. Mode is configured according to Table 1 as soon as one of the IN_ voltages exceeds UVLO and before turning on OUT_ (see the Mode section).
Detailed Description
The MAX5930/MAX5931 are circuit-breaker ICs for hotswap applications where a line card is inserted into a live backplane. The MAX5930/MAX5931 operate down to 1V provided one of the inputs is above 2.7V and only one supply is above 11V. Normally, when a line card is plugged into a live backplane, the card's discharged filter capacitors provide low impedance that can momentarily cause the main power supply to collapse. The MAX5930/MAX5931 reside either on the backplane or on the removable card to provide inrush current limiting and short-circuit protection. This is achieved by using external N-channel MOSFETs, external current-sense resistors, and on-chip comparators. The startup period and current-limit threshold of the MAX5930/MAX5931 can be adjusted with external resistors. Figure 1 shows the MAX5930/MAX5931 functional diagram. The MAX5930 offers three programmable current limits, selectable fault-management mode, and selectable STAT_ output polarity. The MAX5930 features fixed current limits, selectable fault-management mode, and fixed STAT_ output polarity.
The MAX5930/MAX5931 turns off all channels if any of the above conditions are not met. After a fault-latched shutdown, cycle any of the ON_ pins to unlatch and restart all channels.
Power-Sequencing Mode
Leave MODE floating to enter power-sequencing mode. While in power-sequencing mode, the MAX5930/MAX5931 turn on and off each channel depending on the state of the corresponding VON_. To turn on a given channel: * At least one VIN_ must exceed VUVLO (2.45V) for the UVLO to startup delay (37.5ms). * All VIN_ must exceed VPWRRDY (0.95V). * The corresponding V ON_ must exceed V ON,TH (0.875V). * No faults may be present on any channel. The MAX5930/MAX5931 turn off all channels if any of the above conditions are not met. After a fault-latched shutdown, cycle any of the ON_ pins to unlatch and restart all channels, dependent on the corresponding VON_ state.
Mode
The MAX5930/MAX5931 supports three modes of operation: voltage-tracking, power-sequencing, and independent mode. Select the appropriate mode according to Table 1. Voltage-Tracking Mode Connect MODE high to enter voltage-tracking mode. While in voltage-tracking mode, all channels turn on and off together. To turn all channels on: * At least one VIN_ must exceed VUVLO (2.45V) for the UVLO to startup delay (37.5ms). * All VIN_ must exceed VPWRRDY (0.95V). * All VON_ must exceed VON,TH (0.875V). * No faults may be present on any channel.
Independent Mode
Tie MODE to GND to enter independent mode. While in independent mode the MAX5930/MAX5931 provide complete independent control for each channel. To turn on a given channel: * At least one VIN_ must exceed VUVLO (2.45V) for the UVLO to startup delay (37.5ms). * The corresponding V IN_ must exceed V PWRRDY (0.95V). * The corresponding V ON_ must exceed V ON,TH (0.875V).
Table 1. Operational Mode Selection
MODE High (Connect to BIAS) OPEN GND OPERATION Voltage Tracking Voltage Sequencing Independent
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
RLIM1 LIM1* IN1 VSC, TH RSENSE1 FAST COMP SENSE1 UVLO BIAS AND REFERENCES TIMING OSCILLATOR 2.45V UVLO FAST COMP SENSE2 VFC, TH STARTUP OSCILLATOR VFC, TH VSC, TH RSENSE2 RTIM LTIM 1nF BIAS POL* LIM2* IN2 RLIM2
SLOW COMP GATE1 Q1 OUT1 3mA 50mA CHARGE PUMP SLOW DISCHARGE FAST DISCHARGE 100A CURRENT CONTROL AND STARTUP LOGIC
SLOW COMP GATE2
DEVICE CONTROL LOGIC
CURRENT CONTROL AND STARTUP LOGIC
CHARGE PUMP SLOW DISCHARGE FAST DISCHARGE 100A
Q2 OUT2 3mA 50mA
STAT1 LIM3* RLIM3 IN3 VSC, TH RSENSE3 FAST COMP SENSE3 UVLO VFC, TH
STAT2
MAX5930 MAX5931
SLOW COMP GATE3 Q3 OUT3 3mA 50mA CHARGE PUMP SLOW DISCHARGE FAST DISCHARGE 100A CURRENT CONTROL AND STARTUP LOGIC ON INPUT COMPARATORS
FAULT MANAGEMENT
OPERATION MODE
*MAX5930 ONLY.
STAT3
LATCH*
ON1 ON2 ON3
MODE
Figure 1. Functional Diagram
The MAX5930/MAX5931 turn off the corresponding channel if any of the above conditions are not met. During a fault condition on a given channel only, the affected channel is disabled. After a fault-latched shutdown, recycle the corresponding ON_ inputs to unlatch and restart only the corresponding channel.
Startup Period
RTIM sets the duration of the startup period from 0.4ms (RTIM = 4k) to 51ms (RTIM = 500k) (see the Setting the Startup Period, RTIM section). The default startup period is fixed at 9ms when TIM is floating. The startup period begins after the turn-on conditions are met as described in the Mode section, and the device is not latched or in its autoretry delay (see the Latched and Autoretry Overcurrent Fault Management section).
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Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
ON1
ON2
ON3
VUVLO (2.45V) ANY IN_ VPWRRDY (0.95V)
IN2 VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
OUT1* OUT2* OUT3*
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 2. Voltage-Tracking Timing Diagram (Provided tD, UVLO Requirement is Met) ______________________________________________________________________________________ 11
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
ON1
ON2
ON3
ANY IN_
VUVLO (2.45V) VPWRRDY (0.95V)
IN2
VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
*
OUT1
*
OUT2
*
*
OUT3
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 3. Power-Sequencing Timing Diagram (Provided tD, UVLO Requirement is Met)
12
______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers
exceed VSU,TH. This effectively regulates the inrush current during startup.
ON1 = ON2 = ON3 OVERCURRENT FAULT CONDITION
MAX5930/MAX5931
Figure 6 shows the startup waveforms. STAT_ is asserted immediately after the startup period if no fault condition is present.
VariableSpeed/BiLevel Fault Protection
*
OUT1
*
OUT2
VariableSpeed/BiLevel fault protection incorporates comparators with different thresholds and response times to monitor the load current (Figure 7). During the startup period, protection is provided by limiting the load current. Protection is provided in normal operation (after the startup period has expired) by discharging the MOSFET gates with a strong 3mA/50mA pulldown current in response to a fault condition. After a fault, STAT_ is deasserted. Use the LATCH input to control whether the STAT_ outputs latch off or autoretry (see the Latched and Autoretry Fault Management section). Slow-Comparator Startup Period The slow comparator is disabled during the startup period while the external MOSFETs are turning on. Disabling the slow comparator allows the device to ignore the higher-than-normal inrush current charging the board capacitors when a card is first plugged into a live backplane. Slow-Comparator Normal Operation After the startup period is complete, the slow comparator is enabled and the device enters normal operation. The comparator threshold voltage (VSC,TH) is adjustable from 25mV to 100mV. The slow-comparator response time is 3ms for a 1mV overdrive. The response time decreases to 100s with a large overdrive. The variable-speed response time allows the MAX5930/MAX5931 to ignore low-amplitude momentary glitches, thus increasing system noise immunity. After an extended overcurrent condition, a fault is generated, STAT_ outputs are deasserted and the MOSFET gates are discharged with a 3mA pulldown current. Fast-Comparator Startup Period During the startup period, the fast comparator regulates the gate voltages to ensure that the voltage across the sense resistor does not exceed the startup fast-comparator threshold voltage (VSU,TH), VSU,TH is scaled to two times the slow-comparator threshold (VSC,TH).
*
OUT3
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY
OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 4. Power-Sequencing Fault Turn-Off
The MAX5930/MAX5931 limit the load current if an overcurrent fault occurs during startup instead of completely turning off the external MOSFETs. The slow comparator is disabled during the startup period and the load current can be limited in two ways: 1) Slowly enhancing the MOSFETs by limiting the MOSFET gate-charging current. 2) Limiting the voltage across the external currentsense resistor. During the startup period, the gate-drive current is limited to 100A and decreases with the increase of the gate voltage (see the Typical Operating Characteristics). This allows the controller to slowly enhance the MOSFETs. If the fast comparator detects an overcurrent, the MAX5930/MAX5931 regulate the gate voltage to ensure that the voltage across the sense resistor does not
______________________________________________________________________________________
13
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
ON1
ON2
ON3
VUVLO (2.45V) IN1 VPWRRDY (0.95V)
IN2
VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
tD,UVLO
*
OUT1
*
OUT2
*
OUT3
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 5. Independent-Mode Timing Diagram 14 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
ON_
STAT_ tSTART VGATE_ 3ms
SLOW COMPARATOR
TURN-OFF TIME
VDRIVE VOUT_ VTH
FAST COMPARATOR
VGATE_ VOUT_ VFC,TH RSENSE_
130s CBOARD_ = LARGE CBOARD_ = 0 200ns
ILOAD_ tON
VSC,TH
VFC,TH (2 x VSC,TH)
SENSE VOLTAGE (VIN - VSENSE)
Figure 6. Independent-Mode Startup Waveforms
Figure 7. VariableSpeed/BiLevel Response
Fast-Comparator Normal Operation In normal operation, if the load current reaches the fastcomparator threshold, a fault is generated, STAT_ is deasserted, and the MOSFET gates are discharged with a strong 50mA pulldown current. This happens in the event of a serious current overload or a dead short. The fast-comparator threshold voltage (V FC,TH ) is scaled to two times the slow-comparator threshold (VSC,TH). This comparator has a fast response time of 200ns (Figure 7).
Bringing all input supplies below the UVLO threshold for longer than tD,GF reinitiates tD,UVLO and the startup period, tSTART. See Figure 8 for an example of automatic turn-on function.
Latched and Autoretry Fault Management
The MAX5930 can be configured to either latch the external MOSFETs off or to autoretry (see Table 2). Toggling ON_ below 0.875V for at least 100s clears the MAX5930/MAX5931 (LATCH = FLOAT) fault and reinitiates the startup period. Similarly, the MAX5930/ MAX5931 (LATCH = GND) turn the external MOSFETs off when an overcurrent fault is detected, then automatically restart after the autoretry delay that is internally set to 64 times tSTART.
Undervoltage Lockout (UVLO)
The UVLO prevents the MAX5930/MAX5931 from turning on the external MOSFETs until one input voltage exceeds the UVLO threshold (2.45V) for tD,UVLO. The MAX5930/MAX5931 use power from the highest input voltage rail for the charge pumps. This allows for more efficient charge-pump operation. The highest VIN_ is provided as an output at BIAS. The UVLO protects the external MOSFETs from an insufficient gate-drive voltage. tD,UVLO ensures that the board is fully inserted into the backplane and that the input voltages are stable. The MAX5930/MAX5931 includes a UVLO glitch filter (tD,GF) to reject all input voltage noise and transients.
Status Outputs (STAT_)
The status (STAT_) outputs are open-drain outputs that assert when hot swap is successful and tSTART has elapsed. STAT_ deasserts if ON_ is low or if the channel is turned off for any fault condition. The polarity of the STAT_ outputs is selected using POL for the MAX5930 (see Table 3). Tables 4 and 5 contain the MAX5930/MAX5931 truth tables.
______________________________________________________________________________________
15
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Table 2. Selecting Fault-Management Mode (MAX5930)
LATCH Floating Low FAULT MANAGEMENT Fault condition latches MOSFETs off Autoretry mode
V3 BACKPLANE V1 V2 REMOVABLE CARD
Table 3. Selecting STAT_ Polarity (MAX5930)
ON1 ON1 ON2 ON3
POL Low Floating Asserts low
STAT_ Asserts high (open-drain)
ON2 ON3
MAX5930 MAX5931
GND
Applications Information
Component Selection
N-Channel MOSFETs Select the external MOSFETs according to the application's current levels. Table 6 lists recommended components. The MOSFET's on-resistance (R DS(ON) ) should be chosen low enough to have a minimum voltage drop at full load to limit the MOSFET power dissipation. High RDS(ON) causes output ripple if there is a pulsating load. Determine the device power rating to accommodate a short-circuit condition on the board at startup and when the device is in autoretry mode (see the MOSFET Thermal Considerations section). Using these devices in latched mode allows the use of MOSFETs with lower power ratings. A MOSFET typically withstands single-shot pulses with higher dissipation than the specified package rating. Table 7 lists some recommended MOSFET manufacturers. Sense Resistor The slow-comparator threshold voltage is adjustable from 25mV to 100mV. Select a sense resistor that causes a drop equal to the slow-comparator threshold voltage at a current level above the maximum normal operating current. Typically, set the overload current at 1.2 to 1.5 times the full load current. The fast-comparator threshold is two times the slow-comparator threshold in normal operating mode. Choose the senseresistor power rating to be greater than or equal to 2 x (IOVERLOAD) x VSC,TH. Table 7 lists some recommended sense-resistor manufacturers.
GND
Figure 8. Automatic Turn-On When Input Voltages are Above their Respective Undervoltage Lockout Threshold (Provided tD,UVLO Requirement is Met)
Slow-Comparator Threshold, RLIM (MAX5930) The slow-comparator threshold voltage is adjustable from 25mV to 100mV, allowing designers to fine-tune the current-limit threshold for use with standard-value sense resistors. Low slow-comparator thresholds allow for increased efficiency by reducing the power dissipated by the sense resistor. Furthermore, the low 25mV slow-comparator threshold is beneficial when operating with supply rails down to 1V because it allows a small percentage of the overall output voltage to be used for current sensing. The VariableSpeed/BiLevel fault protection feature offers inherent system immunity against load transients and noise. This allows the slow-comparator threshold to be set close to the maximum normal operating level without experiencing nuisance faults. To adjust the slow-comparator threshold, calculate RLIM as follows: V - 25mV RLIM = TH 7.5A where VTH is the desired slow-comparator threshold voltage. Shorting LIM_ to GND sets VTH to 25mV. Do not leave LIM_ open.
16
______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Table 4. Status Output Truth Table: Voltage-Tracking and Power-Sequencing Modes
PART CHANNEL 1 FAULT Yes X MAX5930 (POL = 1), MAX5931H X X No Yes X MAX5930 (POL = 0), MAX5931L X X No CHANNEL 2 FAULT X Yes X X No X Yes X X No CHANNEL 3 FAULT X X Yes X No X X Yes X No STAT1/ GATE1* L/OFF L/OFF L/OFF L/OFF H/ON H/OFF H/OFF H/OFF H/OFF L/ON STAT2/ GATE2* L/OFF L/OFF L/OFF L/OFF H/ON H/OFF H/OFF H/OFF H/OFF L/ON STAT3/ GATE3* L/OFF L/OFF L/OFF L/OFF H/ON H/OFF H/OFF H/OFF H/OFF L/ON
*L = Low, H = High.
Table 5. Status Output Truth Table: Independent Mode
CHANNEL 1 FAULT Yes Yes Yes Yes No No No No CHANNEL 2 FAULT Yes Yes No No Yes Yes No No CHANNEL 3 FAULT Yes No Yes No Yes No Yes No STAT1/ GATE1 Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Asserted/ON Asserted/ON STAT2/ GATE2 Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON STAT3/ GATE3 Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON
Note: STAT_ is asserted when hot swap is successful and tON has elapsed. STAT_ is unasserted during a fault.
Table 6. Recommended N-Channel MOSFETs
PART NUMBER IRF7413 IRF7401 IRL3502S MMSF3300 MMSF5N02H MTB60N05H FDS6670A ND8426A FDB8030L Fairchild Motorola International Rectifier MANUFACTURER DESCRIPTION 11m, 8-pin SO, 30V 22m, 8-pin SO, 20V 6m, D2PAK, 20V 20m, 8-pin SO, 30V 30m, 8-pin SO, 20V 14m, D2PAK, 50V 10m, 8-pin SO, 30V 13.5m, 8-pin SO, 20V 4.5m, D2PAK, 30V
______________________________________________________________________________________
17
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Table 7. Component Manufacturers
COMPONENT Sense Resistors IRC Fairchild MOSFETs International Rectifier Motorola MANUFACTURER Dale-Vishay PHONE 402-562-3131 704-264-8861 888-522-5372 310-233-3331 602-224-3576 WEBSITE www.vishay.com www.irctt.com www.fairchildsemi.com www.irf.com www.mot-sps.com/ppd
Setting the Startup Period, RTIM The startup period (tSTART) is adjustable from 0.4ms to 50ms. The adjustable startup period feature allows systems to be customized for MOSFET gate capacitance and board capacitance (CBOARD). The startup period is adjusted with a resistor connected from TIM to GND (RTIM). RTIM must be between 4k and 500k. The startup period has a default value of 9ms when TIM is left floating. Calculate RTIM with the following equation: t START RTIM = 128 x 800pF where tSTART is the desired startup period.
t= where:
CGATE x VGATE + QGATE IGATE
C GATE is the external gate to ground capacitance (Figure 9), VGATE is the change in gate charge, QGATE is the MOSFET total gate charge, IGATE is the gate-charging/discharging current. In this case, the inrush current depends on the MOSFET gate-to-drain capacitance (CRSS) plus any additional capacitance from GATE to GND (CGATE), and on any load current (ILOAD) present during the startup period. IINRUSH = CBOARD x IGATE + ILOAD CRSS + CGATE
Startup Sequence
There are two ways of completing the startup sequence. Case A describes a startup sequence that slowly turns on the MOSFETs by limiting the gate charge. Case B uses the current-limiting feature and turns on the MOSFETs as fast as possible while still preventing a high inrush current. The output voltage ramp-up time (tON) is determined by the longer of the two timings, case A and case B. Set the startup timer (tSTART) to be longer than tON to guarantee enough time for the output voltage to settle. Case A: Slow Turn-On (Without Current Limit) There are two ways to turn on the MOSFETs without reaching the fast-comparator current limit: * If the board capacitance (C BOARD) is small, the inrush current is low. * If the gate capacitance is high, the MOSFETs turn on slowly. In both cases, the turn-on time is determined only by the charge required to enhance the MOSFET. The small 100A gate-charging current effectively limits the output voltage dV/dt. Connecting an external capacitor between GATE and GND extends the turnon time. The time required to charge/discharge a MOSFET is as follows:
Example: Charging and discharging times using the Fairchild FDB7030L MOSFET If VIN1 = 5V then GATE1 charges up to 10.4V (VIN1 + VDRIVE), therefore VGATE = 10.4V. The manufacturer's data sheet specifies that the FDB7030L has approximately 60nC of gate charge and CRSS = 600pF. The MAX5930/MAX5931 have a 100A gate charging current and a 3mA/50mA normal/strong discharging current. CBOARD = 6F and the load does not draw any current during the startup period. With no gate capacitor, the inrush current, charge, and discharge times are:
6F x 100A + 0 = 1A 600pF + 0 0 x 10.4V + 60nC t CHARGE = = 0.6ms 100A 0 x 10.4V + 60nC tDISCHARGE(NORMAL) = = 0.02ms 3mA 0 x 10.4V + 60nC = 1.2s tDISCHARGE(STRONG) = 50mA IINRUSH =
18
______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
RSENSE_ VIN_ VOUT_ CBOARD RPULLUP IN_ SENSE_ GATE_ CGATE IN_ ON_ STAT_ MAX5930 MAX5931 R2 ON_ GND MAX5930 MAX5931 VTURN-ON (R2 x R1) VON, TH R2 SENSE_ GATE_ VIN
R1
Figure 9. Operating with an External Gate Capacitor
Figure 10. Adjustable Undervoltage Lockout
With a 22nF gate capacitor, the inrush current, charge, and discharge times are:
6F x 100A + 0 = 26.5mA 600pF + 22nF 22nF x 10.4V + 60nC t CHARGE = = 2.89ms 100A 22nF x 10.4V + 60nC tDISCHARGE(NORMAL) = = 0.096ms 3mA 22nF x 10.4V + 60nC = 5.8s tDISCHARGE(STRONG) = 50mA IINRUSH =
under this condition, an external gate capacitor is not required.
ON Comparators
The ON comparators control the on/off function of the MAX5930/MAX5931. ON_ is also used to reset the fault latch (latch mode). Pull VON_ low for 100s, tUNLATCH, to reset the shutdown latch. ON_ also programs the UVLO threshold (see Figure 10). A resistive-divider between VIN_, VON_, and GND sets the user-programmable turn-on voltage. In power-sequencing mode, an RC circuit can be used at ON_ to set the delay timing (see Figure 11).
Case B: Fast Turn-On (With Current Limit) In applications where the board capacitance (CBOARD) is high, the inrush current causes a voltage drop across R SENSE that exceeds the startup fast-comparator threshold. The fast comparator regulates the voltage across the sense resistor to VFC,TH. This effectively regulates the inrush current during startup. In this case, the current charging CBOARD can be considered constant and the turn-on time is: C x VIN x RSENSE t ON = BOARD VFC,TH The maximum inrush current in this case is: IINRUSH = VFC,TH RSENSE
Using the MAX5930/MAX5931 on the Backplane
Using the MAX5930/MAX5931 on the backplane allows multiple cards with different input capacitance to be inserted into the same slot even if the card does not have on-board hot-swap protection. The startup period can be triggered if IN_ is connected to ON_ through a trace on the card (Figure 12).
Input Transients
The voltage at IN1, IN2, or IN3 must be above VUVLO during inrush and fault conditions. When a short-circuit condition occurs on the board, the fast-comparator trips cause the external MOSFET gates to be discharged at 50mA according to the mode of operation (see the Mode section). The main system power supply must be able to sustain a temporary fault current, without dropping below the UVLO threshold of 2.45V, until the external MOSFET is completely off. If the main system power supply collapses below UVLO, the MAX5930/MAX5931 force the device to restart once the supply has recovered. The MOSFET is turned off in a very short time resulting in a high di/dt. The
19
Figure 6 shows the waveforms and timing diagrams for a startup transient with current regulation (see the Typical Operating Characteristics). When operating
______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
RSENSEY VY CBOARDY ON VEN OFF C1 GND GND INZ SENSEZ GATEZ MAX5930 MAX5931 R1 ON INY SENSEY GATEY Q1 OUTY
VZ RSENSEZ
OUTZ Q2 CBOARDZ
VEN t1 = -R1C1 ln( VONZ, TH VON
VEN - VONY, TH VEN
)
VONY, TH VY t2 = -R1C1 ln(
VEN - VONZ, TH VEN
)
VZ VEN - VONY, TH VEN - VONZ, TH
tDELAY = -R1C1 ln(
)
t0
t1 tDELAY
t2
Figure 11. Power Sequencing: Channel Z Turns On tDELAY After Channel Y
backplane delivering the power to the external card must have low inductance to minimize voltage transients caused by this high di/dt.
MOSFET Thermal Considerations
During normal operation, the external MOSFETs dissipate little power. The MOSFET RDS(ON) is low when the MOSFET is fully enhanced. The power dissipated in normal operation is P D = I LOAD 2 x R DS(ON) . The most power dissipation occurs during the turn-on and turn-off transients when the MOSFETs are in their linear regions. By taking into consideration the worst-case scenario of a continuous short-circuit fault, consider these two cases: 1) The single turn-on with the device latched after a fault: MAX5930/MAX5931 (LATCH = high or floating).
20
2) The continuous autoretry after a fault: MAX5930/ MAX5931 (LATCH = low). MOSFET manufacturers typically include the package thermal resistance from junction to ambient (RJA) and thermal resistance from junction to case (RJC), which determine the startup time and the retry duty cycle (d = tSTART/(tSTART + tRETRY). Calculate the required transient thermal resistance with the following equation: Z JA(MAX) TJMAX - TA VIN x ISTART
where ISTART = VSU,TH / RSENSE.
______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
BACKPLANE REMOVABLE CARD WITH NO HOT-INSERTION PROTECTION HIGH-CURRENT PATH POWER SUPPLY VIN VOUT CBOARD IN_ SENSE_ GATE_ MAX5930 MAX5931 ON_
SENSE RESISTOR
MAX5930 MAX5931
Figure 12. Using the MAX5930/MAX5931 on a Backplane
Figure 13. Kelvin Connection for the Current-Sense Resistors
Layout Considerations
To take full tracking advantage of the switch response time to an output fault condition, it is important to keep all traces as short as possible and to maximize the high-current trace dimensions to reduce the effect of undesirable parasitic inductance. Place the MAX5930/MAX5931 close to the card's connector. Use a ground plane to minimize impedance and inductance. Minimize the current-sense resistor trace length (<10mm), and ensure accurate current sensing with Kelvin connections (Figure 13). When the output is short circuited, the voltage drop across the external MOSFET becomes large. Hence, the power dissipation across the switch increases, as does the die temperature. An efficient way to achieve good power dissipation on a surface-mount package is to lay out two copper pads directly under the MOSFET package on both sides of the board. Connect the two pads to the ground plane through vias, and use enlarged copper mounting pads on the topside of the board.
Pin Configurations (continued)
TOP VIEW
ON2 1 ON1 2 IN1 3 SENSE1 4 GATE1 5 STAT1 6 STAT2 7 TIM 8 LATCH 9 STAT3 10 20 MODE 19 ON3 18 IN2 17 SENSE2
MAX5931
16 GATE2 15 IN3 14 SENSE3 13 GATE3 12 GND 11 BIAS
QSOP
______________________________________________________________________________________
21
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers MAX5930/MAX5931
Typical Operating Circuit
BACKPLANE V1 RSENSE2 V2 RSENSE3 V3 Q3 Q2 REMOVABLE CARD RSENSE1
Q1
OUT1 OUT2 OUT3
IN3 IN2 IN1
SENSE3 SENSE2 SENSE1
GATE3
GATE2
GATE1
ON1 ON2 ON3
ON1 ON2 ON3
STAT1 STAT2
MAX5930 MAX5931
LATCH* MODE LIM1* LIM2* LIM3* POL* BIAS TIM
STAT3
GND
GND
RLIM1**
RLIM2**
RLIM3**
RLIM**
1nF 16V
*MAX5930 ONLY. **OPTIONAL COMPONENT.
Selector Guide
PART MAX5930EEG MAX5931LEEP MAX5931HEEP CURRENT LIMIT Programmable Fixed Fixed FAULT MANAGEMENT Selectable Selectable Selectable STAT_ POLARITY Selectable Asserted Low Asserted High (Open-Drain)
Chip Information
TRANSISTOR COUNT: 7704 PROCESS: BiCMOS
22
______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QSOP.EPS
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
MAX5930/MAX5931
21-0055
E
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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