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| SL4518B Dual Up-Counter High-Voltage Silicon-Gate CMOS The SL4518B Dual BCD Up-Counter consists two identical, internally synchronous 4 -stage counters. The counter stages are Dtype flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or negative-going transition. For single-unit operation the ENABLE input is maintained high and the counter advances on each positive-going transition of the CLOCK. The counters are cleared by high levels on their RESET lines. The counter can be cascaded in the ripple mode by connecting Q4 to the enable input of the subsequent counter while the CLOCK input of the latter is held low. * Operating Voltage Range: 3.0 to 18 V * Maximum input current of 1 A at 18 V over full packagetemperature range; 100 nA at 18 V and 25C * Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION SL4518BN Plastic SL4518BD SOIC TA = -55 to 125 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs CLOCK ENABLE H L PIN 16=VCC PIN 8= GND X X L H X System Logic Semiconductor Outputs RESET L L L L L L Mode Increment Counter Increment Counter No Change No Change No Change No Change Q1 thru Q4=L X H X = don't care SLS SL4518B MAXIMUM RATINGS * Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 10 750 500 100 -65 to +150 260 Unit V V V mA mW mW C C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V ). CC Unused outputs must be left open. SLS System Logic Semiconductor SL4518B DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low -Level Input Voltage Minimum High-Level Output Voltage Maximum Low-Level Output Voltage Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current Test Conditions VOUT= 0.5 V or VCC - 0.5V VOUT= 1.0 V or VCC - 1.0 V VOUT= 1.5 V or VCC - 1.5V VOUT= 0.5 V or VCC - 0.5V VOUT= 1.0 V or VCC - 1.0 V VOUT= 1.5 V or VCC - 1.5V VIN=GND or VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 18 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 Guaranteed Limit -55C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 0.1 5 10 20 100 0.64 1.6 4.2 -2 -0.64 -1.6 -4.2 25C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 0.1 5 10 20 100 0.51 1.3 3.4 -1.6 -0.51 -1.3 -3.4 125 C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 1.0 150 300 600 3000 0.36 0.9 2.4 mA -1.15 -0.36 -0.9 -2.4 Unit V VIL V VOH V VOL VIN=GND or VCC V IIN ICC VIN= GND or VCC VIN= GND or VCC A A IOL VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V mA IOH Minimum Output High VIN= GND or VCC (Source) Current UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V SLS System Logic Semiconductor SL4518B AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200k, Input t r=t f=20 ns) VCC Symbol fmax Parameter Maximum Clock Frequency, (Figure 1) V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 Guaranteed Limit -55C 1.5 3 4 560 230 160 650 225 170 200 100 80 25C 1.5 3 4 560 230 160 650 225 170 200 100 80 7.5 125C 0.75 1.5 2 1120 460 320 1300 450 340 400 200 160 Unit MHz tPHL, t PLH Maximum Propagation Delay, Clock or Enable to Output (Figures 1,3) Maximum Propagation Delay, Reset to Output (Figure 2) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance ns tPHL ns tTHL, t TLH ns CIN pF TIMING REQUIREMENTS(CL=50pF, RL=200 k, Input t r=t f=20 ns) VCC Symbol tw Parameter Minimum Pulse Width, Clock (Figure 1) V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 Guaranteed Limit -55C 200 100 70 250 110 80 400 200 140 15 5 5 25C 200 100 70 250 110 80 400 200 140 15 5 5 125C 400 200 140 500 220 160 800 400 280 15 5 5 Unit ns tw Minimum Pulse Width, Reset (Figure 2) ns tw Minimum Pulse Width, Enable (Figure 3) ns tr, t f Maximum Input Rise and Fall Times (Figure 1) s SLS System Logic Semiconductor SL4518B Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms TIMING DIAGRAM EXPANDED LOGIC DIAGRAM (1/2 of the Device) SLS System Logic Semiconductor SL4518B SLS System Logic Semiconductor |
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