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ADVANCE DATA
Data Sheet No. PD60212 Rev A
IR2520D(S)
ADAPTIVE BALLAST CONTROL IC
* * * * * * * * *
Features
600V Half Bridge Driver Integrated Bootstrap Diode Adaptive zero-voltage switching (ZVS) Internal Crest Factor Over-Current Protection 0 to 5VDC Voltage Controlled Oscillator Programmable minimum frequency Micropower Startup Current (150uA) Internal 15.6V zener clamp on Vcc Small DIP8/SO8 Package
Packages
8-Lead PDIP IR2520D
8 Lead SOIC IR2520DS
Description
The IR2520D(S) is a complete adaptive ballast controller and 600V half-bridge driver integrated into a single IC for fluorescent lighting applications. The IC includes adaptive zero-voltage switching (ZVS), internal crest factor over-current protection, as well as an integrated bootstrap diode. The heart of this IC is a voltage controlled oscillator with externally programmable minimum frequency. All of the necessary ballast features are integrated in a small 8-pin DIP or SOIC package.
Typical Application Diagram
L1 C2 RSUPPLY BR DCP1 CFL LAMP
VCC 1 C1 F1 RFMIN CVCC COM 2 FMIN 3 VCO 4 CVCO
VB 8 HO 7 VS 6 LO 5
M1
LRES
Please note that this data sheet contains advance information which could change before product is released to production.
IR2520D(S)
CBOOT CCP M2 CRES
DCP2
C3
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IR2520D(S)
ADVANCE DATA
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VLO IOMAX IVCO ICC dVS/dt PD RthJA TJ TS TL
Definition
High side floating supply voltage High side floating supply offset voltage High side floating output voltage Low side output voltage Maximum allowable output current (HO,LO) due to external power transistor miller effect Voltage controlled oscillator input current (Note 1) Supply current (Note 2) Allowable offset voltage slew rate Package power dissipation @ TA +25C PD=(TJMAX-TA)RthJA Thermal resistance, junction to ambient 8-Lead PDIP 8-Lead SOIC 8-Lead PDIP 8-Lead SOIC Junction temperature Storage temperature Lead temperature (soldering, 10 seconds)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -500 -5 -20 -50 -- -- -- -- -55 -55 --
Max.
625 VB + 0.3 VB + 0.3 VCC + 0.3 500 +5 20 50 1 0.625 125 200 150 150 300
Units
V
mA mA mA V/ns W
C/W
C
Note 1: This IC contains a zener clamp structure between the chip VCO and COM, which has a nominal breakdown voltage of 6V. Please note that this pin should not be driven by a DC, low impedance power source greater than 6V. Note 2: This IC contains a zener clamp structure between the chip VCC and COM, which has a nominal breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section.
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
VBS VS VCC ICC RFMIN VVCO TJ
Definition
High side floating supply voltage Steady state high side floating supply offset voltage Supply voltage Supply current Minimum frequency setting resistance VCO pin voltage Junction temperature
Min.
VCC - 0.7 -1 VCCUV+ Note 3 10 0 -25
Max.
VCLAMP 600 VCLAMP 10 100 5 125
Units
V
mA k V C
Note 3: Enough current should be supplied into the VCC pin to keep the internal 15.6V zener clamp diode on this pin regulating its voltage, VCLAMP.
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ADVANCE DATA
IR2520D(S)
Electrical Characteristics
VCC = VBS = VBIAS = 14V +/- 0.25V, CLO=CHO=1000pF, RFMIN = 82K and TA = 25C unless otherwise specified.
Symbol
VCCUV+ VCCUVVUVHYS IQCCUV IQCCFLT ICCHF ICCLF VCLAMP
Definition
VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold VCC supply undervoltage lockout hysteresis UVLO quiescent current Fault mode quiescent current VCC supply current f=85KHz VCC supply current f=35KHz VCC Zener clamp voltage
Min. Typ. Max. Units Test Conditions
11.5 9.0 -- 40 -- 3.0 1.0 14.5 12.7 10 2.7 50 180 4.0 2.0 15.6 13.9 11.0 -- 70 -- 6.0 3.0 16.5 mA V A VCC = 10V VVCO=0V VVCO=6V ICC = 10mA V VCC rising from OV
Supply Characteristics
Floating Supply Characteristics
IQBS0 IQBSUV ILK Quiescent VBS supply current Quiescent VBS supply current Offset supply leakage current 60 10 -- 90 20 -- 110 30 50 A VCC=10V, VBS=14V VCC=10V, VBS=7V VB = VS = 600V
Oscillator I/O Characteristics
f(min) f(max) D DTLO DTHO IVCOQS IVCOFS Minimum oscillator frequency (Note 4) Maximum oscillator frequency (Note 4) Oscillator duty cycle LO output deadtime HO output deadtime IVCO quick start IVCO frequency sweep -- -- -- 1.5 1.8 20 0.9 35 85 50 1.8 2.1 40 1.1 -- -- -- 2.1 2.4 60 1.3 kHz % S A VVCO=0V VVCO=2V VVCO=6V VVCO=0V
Gate Driver Output Characteristics
VLO=LOW VHO=LOW VLO=HIGH VHO=HIGH TRISE TFALL VLO -VCOM difference between LO output voltage and COM when LO is low VHO -VS difference between HO output voltage and VS when HO is low VCC -VS difference between VCC and LO output voltage when LO is high VB -VHO difference between VB and HO output voltage when HO is high Turn on rise time Turn off fall time -- -- -- -- -- -- 0 0 0 0 -- -- 100 100 100 100 200 100 mV VVCO=6V VVCO=6V VVCO=6V VVCO=6V nS
Note 4: Frequency shown is nominal for RFMIN=82K. Frequency can be programmed higher or lower depending on the value of RFMIN.
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IR2520D(S)
ADVANCE DATA
Electrical Characteristics
VCC = VBS = VBIAS = 14V +/- 0.25V, CLO=CHO=1000pF, RFMIN = 82K and TA = 25C unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
Protection Characteristics
CSCF VVCOSD Crest factor peak-to-average fault factor VVCO shutdown voltage -- -- 5.0 0.85 -- -- N/A V
Minimum Frequency Setting Characteristics
VFMIN VFMINFLT FMIN lead voltage during normal operation FMIN lead voltage during fault mode -- -- 5.1 0.0 -- -- V V
Block Diagram
Integrated Bootstrap Diode
VCC 1 COM 2 VB 8
FMIN 3
Voltage Controlled Oscillator
High& Low Side HalfBridge Driver
HO 7
VS 6
VCO 4
Fault Logic
Adaptive ZVS
LO 5
VS Sensing
4
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ADVANCE DATA
IR2520D(S)
Lead Definitions
Symbol
VCC COM FMIN VCO LO VS HO VB
Lead Assignments
VCC 1
Description
Supply voltage IC power and signal ground Minimum frequency setting Voltage controlled oscillator input Low-side gate driver output High-side floating return High-side gate driver output High-side gate driver floating supply
8
VB
IR2520D(S)
COM
2
7 HO 6 5
VS LO
FMIN 3 VCO
4
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IR2520D(S)
ADVANCE DATA
State Diagram
Power Turned On
VCCUV Mode
1 /2 -Bridge Off IQCC 150 A
VCC < 10.5V (VCCUV-)
VVCO = 0V VFMIN = 0V
FAULT Mode
1/ 2
-Bridge Off
VCC > 12.7V (VCCUV+)
V VCO = 0V IQCC 150 A VFMIN = 0V
Frequency Sweep Mode
Crest Factor > 5.0 (CSCF) or V VCO < 0.85V (VVCOSD)
VFMIN = 5.1V VCO ramps up, frequency ramps down Crest Factor Disabled ZVS Disabled
VCC < 10V (VCCUV-)
VVCO >4.6V
RUN Mode
VVCO = 6.0V, Frequency = fmin Crest Factor Enabled ZVS Enabled If non-ZVS detected then VVCO decreases and frequency increases to maintain ZVS
All values are typical
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ADVANCE DATA
IR2520D(S)
Functional Description
Under-voltage Lock-Out Mode
The under-voltage lockout mode (UVLO) is defined as the state the IR2520D is in when VCC is below the turn-on threshold of the IC. The IR2520D under voltage lock-out is designed to maintain an ultra low supply current (<200uA), and to guarantee that the IR2520D is fully functional before the high and low side output drivers are activated. The start-up capacitor, CVCC, is charged by current through supply resistor, RSUPPLY, minus the start-up current drawn by the IR2520D. This resistor is chosen to provide sufficient current to supply the IR2520D from the DC bus. CVCC should be large enough to hold the voltage at Vcc above the UVLO threshold for one half cycle of the line voltage as it will only be charged at the peak. Once the capacitor voltage on VCC reaches the start-up threshold, the IR2520D turns on and then HO and LO start oscillating. An internal bootstrap diode between Vcc and VB and external supply capacitor, CBOOT, determine the supply voltage for the high side driver circuitry. An external charge pump circuit consisting of a capacitor, CCP, and two diodes, DCP1 and DCP2, supplies the voltage for the low side driver circuitry. To guarantee that the high-side supply is charged up before the first pulse on pin HO, the first pulse from the output drivers comes from the LO pin. LO may oscillate several times until VB-VS exceeds UVBS+ (9 Volts) and the high-side driver is enabled.
V BUS (+) RSUPPLY DCP1
During UVLO mode, the high and low-side driver outputs, HO and LO, are both low and pin VCO is pulled down to COM for resetting the starting frequency to the maximum.
Frequency Sweep Mode
When VCC exceeds UVLO+ threshold, the IR2520D enters frequency sweep mode. An internal current source charges the external capacitor on pin VCO, CVCO, and the voltage on pin VCO starts ramping up linearly. The frequency ramps down towards the resonance frequency of the high-Q ballast output stage causing the lamp voltage and load current to increase. The voltage on pin VCO continues to increase and the frequency keeps decreasing until the lamp ignites.If the lamp ignites successfully, the voltage on pin VCO continues to increase until it internally limits at 6V. The frequency stops decreasing and stays at the minimum frequency as programmed by an external resistor, RFMIN, on pin FMIN. The minimum frequency should be set below the high-Q resonance frequency of the ballast output stage to ensure that the frequency ramps through resonance for lamp ignition. The desired preheat time can be set by adjusting the slope of the VCO ramp with the external capacitor, CVCO.
VBUS (+)
DCP1
VCC 1 CVCC
DBOOT
15.6 V
VB 8 HO 7
M1
VCC 1 CVCC COM 2 CLAMP VCO 4 VCO CVCO
DBOOT
VB 8 HO 7
M1
Half Bridge Output I LOAD CCP
COM 2 FMIN 3
Half Bridge Output I LOAD CCP
VCO
RFMIN
Half Bridge Driver
VS 6 LO 5
CBOOT
Half Bridge Driver
VS 6 LO 5
CBOOT
M2
M2
VCO 4 CVCO
O
Fault Logic VS Sensing DCP2 Load Return
VBUS (-)
DCP2 Load Return
Figure 2, Frequency sweep circuitry
VBUS (-)
Figure 1, Start-up circuitry
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IR2520D(S)
ADVANCE DATA
Run Mode
The frequency decreases during the frequency sweep mode until the lamp ignites and the ballast output stage becomes a low-Q RCL circuit. The frequency then deceases further until the VCO pin voltage limits at 6V and the minimum frequency is reached. The resonant inductor, resonant capacitor, DC bus voltage and minimum frequency determine the running lamp power. The IC stays at this minimum frequency unless non-zero-voltage switching (non-ZVS) is detected at the VS pin. If the VS voltage has not slewed entirely to COM during the deadtime such that there is voltage across the external low-side switch before LO turns-on, then the system is operating too close to resonance and destructive non-ZVS capacitive mode switching occurs. To correct for this, a pulse of current is sinked from the VCO pin to discharge the external capacitor, CVCO, causing the frequency to increase slightly. The VCO capacitor then charges up during the rest of the cycle slowly due to an internal current source. The frequency is therefore trying to decrease towards resonance by charging the VCO capacitor and the adaptive ZVS circuit "nudges" the frequency back up slightly above resonance when non-ZVS occurs. The circuit then remains in this closed-loop adaptive ZVS mode during running and maintains ZVS operation with changing line conditions, component tolerance variations and lamp/ load variations. The 600V fabrication process used in the development of this IC allows for the VS pin to be accurately measured with an internal high-voltage MOSFET for zero volts during the non-overlapping deadtime, while withstanding the high DC bus voltage during other portions of the switching cycle when the high-side MOSFET is turned on and VS is at the DC bus potential.
VBUS(+)
Fault Mode
Should a lamp non-strike condition occur where the filaments are intact but the lamp does not ignite, the lamp voltage and output stage current will increase during the ignition ramp until the resonant inductor saturates or capacitive mode switching occurs. To detect this, the IC performs a measurement of the VS pin during the on-time of the LO pin. The voltage at the VS pin during the on-time of pin LO is determined by the current flowing through the on-resistance (RDSon) of the external low-side MOSFET. The RDSon of the external low-side MOSFET therefore serves as the current-sensing resistor and VS serves as the current sensing pin on the IC. Sensing the half-bridge current in this way eliminates the need for an external current-sensing resistor and an additional current-sensing pin on the IC. An internal high-voltage MOSFET is turned on when VS is low (when the external low-side MOSFET is "on") for performing the current sensing, and is turned off during the rest of the switching cycle for withstanding the high-voltage when VS is equal to the DC bus voltage (when the external high-side MOSFET is "on"). Since the RDSon has a positive temperature coefficient, the IC performs an internal crest factor measurement for detecting excessive dangerous currents or inductor saturation which can occur during a lamp non-strike fault condition. Performing the crest factor measurement provides a relative current measurement which cancels temperature and/or tolerance variations of the RDSon of the external low-side half-bridge MOSFET. Should the peak current during the on-time of LO exceed a threshold of 5.0 times the average current, the IC will enter Fault Mode and both gate driver outputs will be latched "low". To reset the IC back to frequency sweep mode VCC must be recycled below and above the internal UVLO thresholds. Should an open filament lamp fault occur, hard-switching will occur at the half-bridge. The non-ZVS circuit will detect this and decrease the VCO voltage each cycle to increase the frequency for maintaining ZVS. Should the VCO voltage decrease below 1V, the IC will enter Fault Mode and both gate driver outputs will be latched "low". To reset the IC back to frequency sweep mode VCC must be recycled below and above the internal UVLO thresholds Both the 1V latched VCO threshold and the crest factor protection are enabled when VVCO exceeds 4.6V for the first time during the frequency sweep mode (see State Diagram). This prevents false triggering of the Fault Mode during normal preheat or normal lamp ignition.
DCP1 VCC
1
DBOOT CVCC COM VB 8 HO
M1
2
VCO
O O
Half Bridge Output ILOAD CCP
15.6V
7
Half Bridge Driver VS 6 LO 5
CBOOT
4
CVCO
VCO
O O
Fault Logic
M2
Adaptive ZVMCS Logic
VS Sensing DCP2 Load Return
VBUS (-)
Figure 3, ZVS circuitry
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ADVANCE DATA
IR2520D(S)
Case outlines
8-Lead PDIP IR2520D
01-6014 01-3003 01 (MS-001AB)
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IR2520D(S)
ADVANCE DATA
D A 5
B
FOOTPRINT 8X 0.72 [.028]
DIM A b c D
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
E
6.46 [.255]
1
2
3
4
e e1 H K L
8X 1.78 [.070]
.050 BASIC .025 BASIC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e e1
3X 1.27 [.050]
y
A C 0.10 [.004] y
K x 45
8X b 0.25 [.010]
A1 CAB
8X L 7
8X c
NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE.
8 Lead SOIC IR2520DS
01-6027 01-0021 11 (MS-012AA)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 2/6/2004
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