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19-3371; Rev 0; 7/04
256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers
General Description
The MAX5422/MAX5423/MAX5424 nonvolatile, lineartaper, digital potentiometers perform the function of a mechanical potentiometer, but replace the mechanics with a simple 3-wire SPITM-compatible digital interface. Each device performs the same function as a discrete potentiometer or variable resistor and has 256 tap points. The devices feature an internal, nonvolatile EEPROM used to store the wiper position for initialization during power-up. The 3-wire SPI-compatible serial interface allows communication at data rates up to 5MHz, minimizing board space and reducing interconnection complexity in many applications. The MAX5422/MAX5423/MAX5424 provide three nominal resistance values: 50k (MAX5422), 100k (MAX5423), or 200k (MAX5424). The nominal resistor temperature coefficient is 35ppm/C end-to-end and only 5ppm/C ratiometric. This makes the devices ideal for applications requiring a low-temperature-coefficient variable resistor, such as low-drift, programmable gainamplifier circuit configurations. The MAX5422/MAX5423/MAX5424 are available in a 3mm x 3mm 8-pin TDFN package, and are specified over the extended -40C to +85C temperature range.
Features
o Wiper Position Stored in Nonvolatile Memory (EEPROM) and Recalled Upon Power-Up or Interface Command o 3mm x 3mm x 0.8mm TDFN Package o 35ppm/C End-to-End Resistance Temperature Coefficient o 5ppm/C Ratiometric Temperature Coefficient o 50k, 100k, and 200k Resistor Values o 5MHz SPI-Compatible Serial Interface o 500nA (typ) Static Supply Current o Single-Supply Operation: +2.7V to +5.25V o 256 Tap Positions o 0.5 LSB DNL in Voltage-Divider Mode o 0.5 LSB INL in Voltage-Divider Mode
SPI is a trademark of Motorola, Inc.
MAX5422/MAX5423/MAX5424
Applications
Mechanical Potentiometer Replacement Low-Drift Programmable Gain Amplifiers Audio Volume Control Liquid-Crystal Display (LCD) Contrast Control Low-Drift Programmable Filters
Pin Configuration
TOP VIEW
VDD SCLK DIN CS
1 2 3 4
8
H W L GND
Functional Diagram
H 8-BIT SHIFT REGISTER 8 8 256256 POSITION DECODER
MAX5422 MAX5423 MAX5424
7 6 5
VDD GND
8-BIT LATCH
W
L CS SCLK DIN SPI INTERFACE POR 8-BIT NV MEMORY
TDFN (3mm x 3mm)
MAX5422 MAX5423 MAX5424
Ordering Information/Selector Guide
PART MAX5422ETA MAX5423ETA MAX5424ETA TEMP RANGE -40C to +85C -40C to +85C -40C to +85C END-TO-END RESISTANCE (k) 50 100 200 PIN-PACKAGE 8 TDFN-EP* 8 TDFN-EP* 8 TDFN-EP* TOP MARK AIJ AII AIH
*EP = Exposed pad. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers MAX5422/MAX5423/MAX5424
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +6.0V All Other Pins to GND.................................-0.3V to (VDD + 0.3V) Maximum Continuous Current into H, L, and W MAX5422......................................................................1.3mA MAX5423......................................................................0.6mA MAX5424......................................................................0.3mA Continuous Power Dissipation (TA = +70C) 8-Pin TDFN (derate 24.4mW/C above +70C) .........1951mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40C to +85C. Typical values are at VDD = +5.0V, TA = +25C, unless otherwise noted.)
PARAMETER Resolution Integral Nonlinearity Differential Nonlinearity End-to-End Resistance Temperature Coefficient Ratiometric Resistance Temperature Coefficient MAX5422 Full-Scale Error MAX5423 MAX5424 MAX5422 Zero-Scale Error MAX5423 MAX5424 DC PERFORMANCE (VARIABLE-RESISTOR MODE) Integral Nonlinearity (Note 2) INL VDD = 3V VDD = 5V VDD = 3V, MAX5422, -40C TA +85C, guaranteed monotonic Differential Nonlinearity (Note 2) DNL VDD = 3V, MAX5422, 0C TA +85C, guaranteed monotonic VDD = 3V, MAX5423 VDD = 3V, MAX5424 VDD = 5V DC PERFORMANCE (RESISTOR CHARACTERISTICS) Wiper Resistance Wiper Capacitance End-to-End Resistance RW CW MAX5422 MAX5423 MAX5424 37.5 75 150 VDD = 3V to 5.25V (Note 3) 325 10 50 100 200 62.5 125 250 k 675 pF -1.0 -1.0 3.0 1.5 +2.0 +1.2 1.0 1.0 1.0 LSB SYMBOL N INL DNL TCR (Note 1) (Note 1) 35 5 -0.6 -0.3 -0.15 0.7 0.35 0.18 LSB LSB CONDITIONS MIN 256 0.5 0.5 TYP MAX UNITS Taps LSB LSB ppm/C ppm/C
DC PERFORMANCE (VOLTAGE-DIVIDER MODE)
LSB
2
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256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40C to +85C. Typical values are at VDD = +5.0V, TA = +25C, unless otherwise noted.)
PARAMETER DIGITAL INPUTS (CS, DIN, SCLK) VDD = 3.4V to 5.25V Input High Voltage (Note 4) VIH VDD < 3.4V VDD = 2.7V to 5.25V (Note 4) 0.1 5 MAX5422 Wiper -3dB Bandwidth (Note 5) MAX5423 MAX5424 NONVOLATILE MEMORY RELIABILITY Data Retention Endurance POWER SUPPLY Supply Voltage Standby Current Programming Current VDD IDD IPG Digital inputs = VDD or GND, TA = +25C During nonvolatile write to memory; digital inputs = VDD or GND (Note 6) 2.70 0.5 200 5.25 1 400 V A A TA = +85C TA = +25C TA = +85C 50 200,000 50,000 Years Stores 100 50 25 kHz 2.4 0.7 x VDD 0.8 1 V SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5422/MAX5423/MAX5424
Input Low Voltage Input Leakage Current Input Capacitance DYNAMIC CHARACTERISTICS
VIL IIN CIN
V A pF
TIMING CHARACTERISTICS
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40C to +85C. Typical values are at VDD = +5.0V, TA = +25C, unless otherwise noted. See Figure 1.) (Note 7)
PARAMETER ANALOG SECTION MAX5422 Wiper Settling Time (Note 8) DIGITAL SECTION SCLK Frequency SCLK Clock Period SCLK Pulse-Width High SCLK Pulse-Width Low CS Fall to SCLK Rise Setup SCLK Rise to CS Rise Hold DIN to SCLK Setup fSCLK tCP tCH tCL tCSS tCSH tDS 200 80 80 80 0 50 5 MHz ns ns ns ns ns ns tS MAX5423 MAX5424 400 600 1000 ns SYMBOL CONDITIONS MIN TYP MAX UNITS
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3
256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers MAX5422/MAX5423/MAX5424
TIMING CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40C to +85C. Typical values are at VDD = +5.0V, TA = +25C, unless otherwise noted. See Figure 1.) (Note 7)
PARAMETER DIN Hold after SCLK SCLK Rise to CS Fall Delay CS Rise to SCLK Rise Hold CS Pulse-Width High Write NV Register Busy Time SYMBOL tDH tCS0 tCS1 tCSW tBUSY CONDITIONS MIN 0 20 80 200 12 TYP MAX UNITS ns ns ns ns ms
Note 1: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = VDD and L = GND. The wiper terminal is unloaded and measured with a high-input-impedance voltmeter. Note 2: The DNL and INL are measured with the potentiometer configured as a variable resistor. H is unconnected and L = GND. For the 5V condition, the wiper terminal is driven with a source current of 80A for the 50k configuration, 40A for the 100k configuration, and 20A for the 200k configuration. For the 3V condition, the wiper terminal is driven with a source current of 40A for the 50k configuration, 20A for the 100k, and 10A for the 200k configuration. Note 3: The wiper resistance is measured using the source currents given in Note 2. For operation to VDD = 2.7V, see Maximum Wiper Resistance vs. Temperature in the Typical Operating Characteristics. Note 4: The device draws higher supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (GND + 0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics. Note 5: Wiper at midscale with a 10pF load (DC measurement). L = GND; an AC source is applied to H; and the W output is measured. A 3dB bandwidth occurs when the AC W/H value is 3dB lower than the DC W/H value. Note 6: The programming current operates only during power-up and NV writes. Note 7: Digital timing is guaranteed by design and characterization, and is not production tested. Note 8: Wiper-settling time is the worst-case 0% to 50% rise-time measured between consecutive wiper positions. H = VDD, L = GND, and the wiper terminal is unloaded and measured with a 10pF oscilloscope probe.
Typical Operating Characteristics
(VDD = 5.0V, TA = +25C, unless otherwise noted.)
DNL vs. TAP POSITION
MAX5422 toc01
INL vs. TAP POSITION
MAX5422 toc02
WIPER RESISTANCE vs. TAP POSITION
VDD = 2.7V ISRC = 50A
MAX5422 toc03
0.25 0.20 0.15 0.10 DNL (LSB) VOLTAGE-DIVIDER MODE
0.25 0.20 0.15 0.10 INL (LSB) 0.05 0 -0.05 -0.10 -0.15 -0.20 -0.25 VOLTAGE-DIVIDER MODE
700 600 RESISTANCE () 500 400 300 200 100
0.05 0 -0.05 -0.10 -0.15 -0.20 -0.25 0 32 64 96 128 160 192 224 256 TAP POSITION
0
32
64
96
128 160 192 224 256
0 0 32 64 96 128 160 192 224 256 TAP POSITION
TAP POSITION
4
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256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers MAX5422/MAX5423/MAX5424
Typical Operating Characteristics (continued)
(VDD = 5.0V, TA = +25C, unless otherwise noted.)
WIPER TRANSIENT AT POWER-ON
MAX5422 toc04
END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE
END-TO-END RESISTANCE % CHANGE 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -40 -15 10 35 60 85
MAX5422toc05
STANDBY SUPPLY CURRENT vs. TEMPERATURE
0.9 0.8 SUPPLY CURRENT (A) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 -15 10 35 VDD = 3.0V VDD = 2.7V 60 85 TEMPERATURE (C) VDD = 5.25V VDD = 4.0V
MAX5422 toc06
1.0 VDD 1V/div
1.0
W 1V/div CL = 10pF TAP = 128 H = VDD 4s/div
TEMPERATURE (C)
MAXIMUM WIPER RESISTANCE vs. TEMPERATURE
MAX5422 toc07
SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE
MAX5422 toc08
700 600 VDD = 2.7V RESISTANCE () 500 400 300 200 100 0 -40 -15 10 35 60 VDD = 3.0V VDD = 4.5V VDD = 5.25V
600 500 SUPPLY CURRENT (A) 400 300 200 100 0
85
0
1
2
3
4
5
TEMPERATURE (C)
DIGITAL INPUT VOLTAGE (V)
THD+N RESPONSE
1:1 RATIO 20Hz TO 20kHz BANDPASS
MAX5422 toc09
100 10 1 THD+N (%)
INL vs. TAP POSITION (MAX5422)
VARIABLE-RESISTOR MODE VDD = 2.7V ISRC = 50A
MAX5422 toc10
2.0 1.5 1.0
0.1 0.01 0.001
INL (LSB) 10 100 1k FREQUENCY (Hz) 10k 100k
0.5 0 -0.5
0.0001 -1.0 0 32 64 96 128 160 192 224 256 TAP POSITION
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5
256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers MAX5422/MAX5423/MAX5424
Typical Operating Characteristics (continued)
(VDD = 5.0V, TA = +25C, unless otherwise noted.)
INL vs. TAP POSITION (MAX5423)
MAX5422 toc11
INL vs. TAP POSITION (MAX5424)
MAX5422 toc12
DNL vs. TAP POSITION (MAX5422)
VARIABLE-RESISTOR MODE 0.2 0.1 DNL (LSB) 0 -0.1 -0.2 -0.3
MAX5422 toc13
2.0 1.5 1.0 INL (LSB) 0.5 0 -0.5 -1.0 0 32 64 96 VARIABLE-RESISTOR MODE VDD = 2.7V ISRC = 20A
2.0 1.5 1.0 INL (LSB) 0.5 0 -0.5 -1.0 VARIABLE-RESISTOR MODE VDD = 2.7V ISRC = 10A
0.3
128 160 192 224 256
0
32
64
96
128 160 192 224 256
0
32
64
96
128 160 192 224 256
TAP POSITION
TAP POSITION
TAP POSITION
DNL vs. TAP POSITION (MAX5423)
MAX5422 toc14
DNL vs. TAP POSITION (MAX5424)
0.4 0.3 VARIABLE-RESISTOR MODE
MAX5422 toc15
0.3 VARIABLE-RESISTOR MODE 0.2 0.1 DNL (LSB) 0 -0.1 -0.2 -0.3 0 32 64 96
0.5
DNL (LSB) 128 160 192 224 256
0.2 0.1 0 -0.1 -0.2 -0.3 0 32 64 96 128 160 192 224 256
TAP POSITION
TAP POSITION
6
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256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers MAX5422/MAX5423/MAX5424
Pin Description
PIN 1 2 3 4 5 6 7 8 -- NAME VDD SCLK DIN CS GND L W H EP Serial-Interface Clock Input Serial-Interface Data Input Active-Low Digital-Input Chip Select Ground Low Terminal. The voltage at L can be greater than or less than the voltage at H. Current can flow into or out of L. Wiper Terminal High Terminal. The voltage at H can be greater than or less than the voltage at L. Current can flow into or out of H. Exposed Pad. The exposed pad is not internally connected. Connect to GND or leave floating. FUNCTION Power-Supply Input. Bypass VDD with a 0.1F capacitor from VDD to GND.
CS tCS0 tCSS SCLK tCL tCH tCP tCSH tCSW tCS1
tDS
tDH
DIN
Figure 1. Digital Interface and Timing Diagram
Detailed Description
The MAX5422/MAX5423/MAX5424 contain a resistor array with 255 resistive elements. The MAX5422 has a total end-to-end resistance of 50k; the MAX5423 has an end-to-end resistance of 100k; and the MAX5424 has an end-to-end resistance of 200k. The MAX5422/MAX5423/MAX5424 allow access to the high, low, and wiper terminals for a standard voltage-divider configuration. H, L, and W can be connected in any desired configuration as long as their voltages fall between GND and VDD. A simple, 3-wire, SPI serial interface moves the wiper among the 256 tap points. The nonvolatile memory stores the wiper position and recalls the stored wiper position upon power-up. The nonvolatile memory is guaranteed for 50 years for wiper data retention and up to 200,000 wiper store cycles.
Analog Circuitry
The MAX5422/MAX5423/MAX5424 consist of a resistor array with 255 resistive elements; 256 tap points are accessible to the wiper, W, along the resistor string between H and L. Select the wiper tap point by programming the potentiometer through the 3-wire (SPI) interface. Eight data bits, and a control byte program the wiper position. The H and L terminals of the MAX5422/MAX5423/MAX5424 are similar to the two end terminals of a mechanical potentiometer. The MAX5422/MAX5423/MAX5424 feature power-on reset circuitry that loads the wiper position from the nonvolatile memory at power-up.
Digital Interface
The MAX5422/MAX5423/MAX5424 use a 3-wire, SPIcompatible, serial data interface (Figure 1 and 2). This write-only interface contains three inputs: chip-select
7
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256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers MAX5422/MAX5423/MAX5424
(CS), data clock (SCLK), and data in (DIN). Drive CS low to enable the serial interface and clock data synchronously into the shift register on each SCLK rising edge. The WRITE commands (C1, C0 = 00 or 01) require 16 clock cycles to clock in the command and data (Figure 2a). The COPY commands (C1, C0 = 10, 11) can use either eight clock cycles to transfer the command bits (Figure 2b) or 16 clock cycles with 8 data bits that are disregarded by the device (Figure 2a). After loading data into the shift register, drive CS high to latch the data into the appropriate potentiometer control register and disable the serial interface. Keep CS low during the entire serial-data stream to avoid corruption of the data. The serial-data timing for the potentiometer is shown in Figures 1 and 2.
Table 1. Register Map
CLOCK EDGE Bit name Write wiper register Write NV register Copy wiper register to NV register Copy NV register to wiper register 1 -- 0 0 0 0 2 -- 0 0 0 0 3 C1 0 0 1 1 4 C0 0 1 0 1 5 -- 0 0 0 0 6 -- 0 0 0 0 7 -- 0 0 0 0 8 -- 0 0 0 0 9 D7 D7 D7 -- -- 10 D6 D6 D6 -- -- 11 D5 D5 D5 -- -- 12 D4 D4 D4 -- -- 13 D3 D3 D3 -- -- 14 D2 D2 D2 -- -- 15 D1 D1 D1 -- -- 16 D0 D0 D0 -- --
A) 16-BIT COMMAND/DATA WORD
CS
SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DIN
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
B) 8-BIT COMMAND WORD
CS
SCLK 1 2 3 4 5 6 7 8
DIN
C1
C0
Figure 2. Digital-Interface Format 8 _______________________________________________________________________________________
256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers
Write Wiper Register Data written to this register (C1, C0 = 00) controls the wiper positions. The 8 data bits (D7 to D0) indicate the position of the wiper. For example, if DIN = 0000 0000, the wiper moves to the position closest to L. If DIN = 1111 1111, the wiper moves closest to H. This command writes data to the volatile random access memory (RAM), leaving the NV registers unchanged. When the device powers up, the data stored in the NV registers transfers to the volatile wiper register, moving the wiper to the stored position. Write NV Register The "write NV register" command (C1, C0 = 01) stores the position of the wipers to the NV registers for use at power-up. Alternatively, the "copy wiper register to NV register" command writes to the NV register. Writing to the NV registers, does not affect the position of the wipers. Copy Wiper Register to NV Register The "copy wiper register to NV register" command (C1, C0 = 10) stores the current position of the wiper to the NV register for use at power-up. Copy NV Register to Wiper Register The "copy NV register to wiper register" (C1, C0 = 11) restores the wiper position to the current value stored in the NV register. grammed, it enters into standby mode and supply current drops to 0.5A (typ).
MAX5422/MAX5423/MAX5424
Nonvolatile Memory
The internal EEPROM consists of a nonvolatile register that retains the last value stored prior to power-down. The nonvolatile register is programmed to midscale at the factory. The nonvolatile memory is guaranteed for 50 years for wiper data retention and up to 200,000 wiper write cycles.
Power-Up
Upon power-up, the MAX5422/MAX5423/MAX5424 load the data stored in the nonvolatile wiper register into the volatile wiper register, updating the wiper position with the data stored in the nonvolatile wiper register. This initialization period takes 10s.
Applications Information
The MAX5422/MAX5423/MAX5424 are intended for circuits requiring digitally controlled adjustable resistance, such as LCD contrast control (where voltage biasing adjusts the display contrast), or programmable filters with adjustable gain and/or cutoff frequency.
Positive LCD Bias Control
Figures 3 and 4 show an application where a voltagedivider or variable resistor is used to make an adjustable, positive LCD-bias voltage. The op amp provides buffering and gain to the resistor-divider network made by the potentiometer (Figure 3) or to a fixed resistor and a variable resistor (see Figure 4).
Standby Mode
The MAX5422/MAX5423/MAX5424 feature a low-power standby mode. When the device is not being pro-
5V H MAX5422 MAX5423 MAX5424 L W VOUT MAX5422 MAX5423 MAX5424 30V
5V
30V
H
VOUT
W L
Figure 3. Positive LCD-Bias Control Using a Voltage-Divider
Figure 4. Positive LCD-Bias Control Using a Variable Resistor
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9
256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers MAX5422/MAX5423/MAX5424
Programmable Filter
Figure 5 shows the configuration for a 1st-order programmable filter. The gain of the filter is adjusted by R2, and the cutoff frequency is adjusted by R3. Use the following equations to calculate the DC gain (G) and the 3dB cutoff frequency (fC): G = 1+ fC = R1 R2 1 2 x R 3 x C
Adjustable Voltage Reference
Figure 6 shows the MAX5422/MAX5423/MAX5424 used as the feedback resistors in an adjustable voltage-reference application. Independently adjust the output voltage of the MAX6160 from 1.23V to VIN - 0.2V by changing the wiper position of the MAX5422/ MAX5423/MAX5424.
Offset Voltage and Gain Adjustment
Connect the high and low terminals of one potentiometer of a MAX5422/MAX5423/MAX5424 between the NULL inputs of a MAX410 and the wiper to the op amp's positive supply to nullify the offset voltage over the operating temperature range. Install another MAX5422/MAX5423/MAX5424 potentiometer in the feedback path to adjust the gain of the MAX410 (see Figure 7).
C VIN H R3 L VOUT 5V
MAX5422
W H R2
MAX410
R1 7 2 1 8 6 W 3 4 -5V
MAX5422 MAX5423 MAX5424
L
Figure 5. Programmable Filter
Figure 7. Offset Voltage Adjustment Circuit
+5V VIN OUT H MAX6160 ADJ MAX5422 MAX5423 MAX5424 GND W V0 REF
Chip Information
TRANSISTOR COUNT: 10,191 PROCESS: BiCMOS
L
V0 = 1.23V 50k FOR THE MAX5422 R2(k) 100k FOR THE MAX5423 V0 = 1.23V R2(k) V0 = 1.23V 200k FOR THE MAX5424 R2(k)
Figure 6. Adjustable Voltage Reference 10 ______________________________________________________________________________________
256-Tap, Nonvolatile, SPI-Interface, Digital Potentiometers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
6, 8, &10L, DFN THIN.EPS
MAX5422/MAX5423/MAX5424
D
N
PIN 1 INDEX AREA
E
DETAIL A
E2
C L
C L
L A e e
L
PACKAGE OUTLINE, 6, 8, 10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm
NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY
21-0137
F
1
2
COMMON DIMENSIONS SYMBOL A D E A1 L k A2 MIN. 0.70 2.90 2.90 0.00 MAX. 0.80 3.10 3.10 0.05
0.40 0.20 0.25 MIN. 0.20 REF.
PACKAGE VARIATIONS PKG. CODE T633-1 T833-1 T1033-1 T1433-1 T1433-2 N 6 8 10 14 14 D2 1.500.10 1.500.10 1.500.10 1.700.10 1.700.10 E2 2.300.10 2.300.10 2.300.10 2.300.10 2.300.10 e 0.95 BSC 0.65 BSC 0.50 BSC 0.40 BSC 0.40 BSC JEDEC SPEC MO229 / WEEA MO229 / WEEC MO229 / WEED-3 ------b 0.400.05 0.300.05 0.250.05 0.200.03 0.200.03 [(N/2)-1] x e 1.90 REF 1.95 REF 2.00 REF 2.40 REF 2.40 REF
PACKAGE OUTLINE, 6, 8, 10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm
21-0137
F
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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