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CH7009A
CHRONTEL
Brief Summary
Chrontel CH7009 DVI / TV Output Device
Features
* * * * * * * * * * * * * * * * * DVI Transmitter up to 165MHz DVI low jitter PLL DVI hot plug detection TV output supporting up to 1024x768 graphics resolutions MacrovisionTM 7.X copy protection support Programmable digital interface supports RGB and YCrCb TrueScaleTM rendering engine supports underscan in all TV output resolutions Enhanced text sharpness and adaptive flicker removal with up to 7 lines of filtering Support for all NTSC and PAL formats Provides CVBS, S-Video and SCART (RGB) outputs TV connection detect Programmable power management 10-bit video DAC outputs Fully programmable through serial port Complete Windows and DOS driver support Low voltage interface support to graphics device Offered in a 64-pin LQFP package
General Description
The CH7009 is a Display controller device which accepts a digital graphics input signal, and encodes and transmits data through a DVI TMDSTM link (DFP can also be supported) or TV output (analog composite, s-video or RGB). The device accepts data over one 12-bit wide variable voltage data port which supports five different data formats including RGB and YCrCb. The DVI processor includes a low jitter PLL for generation of the high frequency serialize clock, and all circuitry required to encode, serialize and transmit data. The CH7009 comes in versions able to drive a DVI display at a pixel rate of up to 165MHz, supporting UXGA resolution displays. No scaling of input data is performed on the data output to the DVI device. The TV-Out processor will perform non-interlace to interlace conversion with scaling and flicker filters, and encode the data into any of the NTSC or PAL video standards. The scaling and flicker filter is adaptive and programmable to enable superior text display. Eight graphics resolutions are supported up to 1024 by 768 with full vertical and horizontal underscan capability in all modes. A high accuracy low jitter phase locked loop is integrated to create outstanding video quality. Support is provided for Macrovision TM and RGB bypass mode which enables driving a VGA CRT with the input data.
XCLK,XCLK*
2
Clock Driver
24 3 24
DVI (TMDSTM link) PLL DVI Encode DVI Serialize DVI Driver
2 2 2 2
TLC,TLC* TDC0,TDC0* TDC1,TDC1* TDC2,TDC2* VSWING HPDET
D [11:0]
12
Data Latch, Demux
2
GPIO[1:0] AS SPC SPD RESET*
H,V,DE VREF
3
H,V,DE Latch
3
Serial Port Control
XI/FIN,XO P-OUT / TLDET* BCO
2
C/H SYNC PLL3 ISET Timing
3 24
Scaling Scan Conv Flicker Filt
TV Encode
Four 10-bit DAC's
CVBS (DAC3) Y (DAC 1) C (DAC 2) CVBS (DAC0)
24
Figure 1: Functional Block Diagram
209-0000-005 Rev. 1.3, 9/29/2000 *TMDS is Trademark of Silicon Image Inc. 1
CHRONTEL
CH7009A
ORDERING INFORMATION
Part number CH7009A-T Package type LQFP Number of pins 64 Voltage supply 3.3V
Chrontel
2210 O'Toole Avenue San Jose, CA 95131-1326 Tel: (408) 383-9328 Fax: (408) 383-9338 www.chrontel.com E-mail: sales@chrontel.com
(c)1998 Chrontel, Inc. All Rights Reserved. Chrontel PRODUCTS ARE NOT AUTHORIZED FOR AND SHOULD NOT BE USED WITHIN LIFE SUPPORT SYSTEMS OR NUCLEAR FACILITY APPLICATIONS WIT HOUT THE SPECIFIC WRITTEN CONSENT OF Chrontel. Life support systems are those intended to support or sustain life and whose failure to p erform when used as directed can reasonably expect to result in personal injury or death. Chrontel reserves the right to make changes at any time without notice to improve and supply the best possible product and is not responsible and does not assume any liability for misapplication or use outside the limits specified in this document. We provide no warranty for the use of our products and assume no liability for errors contained in this document. Printed in the U.S.A.
2
209-0000-005 Rev. 1.3, 9/29/2000

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