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LT5516 800MHz to 1.5GHz Direct Conversion Quadrature Demodulator
FEATURES
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DESCRIPTIO
Frequency Range: 800MHz to 1.5GHz High IIP3: 21.5dBm at 900MHz High IIP2: 52dBm Noise Figure: 12.8dB at 900MHz Conversion Gain: 4.3dB at 900MHz I/Q Gain Mismatch: 0.2dB Shutdown Mode 16-Lead QFN 4mm x 4mm Package with Exposed Pad
The LT (R)5516 is an 800MHz to 1.5GHz direct conversion quadrature demodulator optimized for high linearity receiver applications. It is suitable for communications receivers where an RF or IF signal is directly converted into I and Q baseband signals with bandwidth up to 260MHz. The LT5516 incorporates balanced I and Q mixers, LO buffer amplifiers and a precision, high frequency quadrature generator. In an RF receiver, the high linearity of the LT5516 provides excellent spur-free dynamic range, even with fixed gain front end amplification. This direct conversion receiver can eliminate the need for intermediate frequency (IF) signal processing, as well as the corresponding requirements for image filtering and IF filtering. Channel filtering can be performed directly at the outputs of the I and Q channels. These outputs can interface directly to channelselect filters (LPFs) or to a baseband amplifier.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Cellular/PCS/UMTS Infrastructure High Linearity Direct Conversion I/Q Receiver High Linearity I/Q Demodulator
TYPICAL APPLICATIO
BPF LNA BPF
5V RF + VCC LT5516 IOUT+ IOUT- LPF VGA RF - LO + QOUT 0/90 LO - ENABLE EN 90 QOUT-
+
0
POUT, IM3 (dBm/TONE)
DSP LO INPUT LPF VGA
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Figure 1. High Signal-Level I/Q Demodulator for Wireless Infrastructure
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I/Q Output Power, IM3 vs RF Input Power
20 0 POUT -20 -40 IM3 -60 -80 -100 -18 VCC = 5v TA = 25C PLO = -10dBm fLO = 901MHz fRF1 = 899.9MHz fRF2 = 900.1MHz 2 6
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-14
-10 -6 -2 RF INPUT POWER (dBm)
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LT5516
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
QOUT +
Power Supply Voltage ............................................ 5.5V Enable Voltage ...................................................... 0, VCC LO + to LO - Differential Voltage ............................... 2V (+10dBm Equivalent) + to RF - Differential Voltage ................................ 2V RF (+10dBm Equivalent) Operating Ambient Temperature ..............-40C to 85C Storage Temperature Range ................. - 65C to 125C Maximum Junction Temperature .......................... 125C
ORDER PART NUMBER
12 VCC 11 LO - 10 LO + 9 VCC
16 15 14 13 GND 1 RF + RF
-
QOUT -
IOUT +
IOUT -
LT5516EUF
2 3
GND 4 5
VCC
6
VCM
7
EN
8
VCC
UF PART MARKING 5516
UF PACKAGE 16-LEAD (4mm x 4mm) PLASTIC QFN EXPOSED PAD IS GROUND (MUST BE SOLDERED TO PCB) TJMAX = 125C, JA = 38C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
AC ELECTRICAL CHARACTERISTICS
PARAMETER Frequency Range LO Power Conversion Gain dB Conversion Gain Variation vs Temperature Noise Figure Input 3rd Order Intercept Input 2nd Order Intercept Input 1dB Compression Baseband Bandwidth I/Q Gain Mismatch I/Q Phase Mismatch Output Impedance LO to RF Leakage RF to LO Isolation (Note 4) (Note 4) Differential 2-Tone, -10dBm/Tone, f = 200kHz Input = -10dBm R1 = 8.2 CONDITIONS
TA = 25C. VCC = 5V, EN = high, fRF1 = 899.9MHz, fRF2 = 900.1MHz, fLO = 901MHz, PLO = -10dBm unless otherwise noted. (Notes 2, 3) (Test circuit shown in Figure 2)
MIN TYP 0.8 to 1.5 -13 to - 2 Voltage Gain, Load Impedance = 1k - 40C to 85C R1 = 8.2 R1 = 3.3, PLO = -5dBm R1 = 8.2 R1 = 3.3, PLO = -5dBm R1 = 8.2 R1 = 3.3, PLO = -5dBm 2 0.01 11.4 12.8 17.0 21.5 46.0 52.0 6.6 260 0.2 1 120 - 65 57 0.7 4.3 dB/C dB dB dBm dBm dBm dBm dBm MHz dB degree dBm dB MAX UNITS GHz dBm
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LT5516
DC ELECTRICAL CHARACTERISTICS
PARAMETER Supply Voltage Supply Current Shutdown Current Turn-On Time Turn-Off Time EN = High (On) EN = Low (Off) EN Input Current Output DC Offset Voltage (IOUT+ - IOUT-, QOUT+ - QOUT-) Output DC Offset Variation vs Temperature VENABLE = 5V EN = Low CONDITIONS
TA = 25C. VCC = 5V unless otherwise noted.
MIN 4 80 117 120 650 1.6 1.3 2 1 20 25 TYP MAX 5.25 150 20 UNITS V mA A ns ns V V A mV V/C
fLO = 901MHz, PLO = -10dBm - 40C to 85C
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Tests are performed as shown in the configuration of Figure 2 with R1 = 8.2, unless otherwise noted. Note 3: Specifications over the - 40C to 85C temperature range are assured by design, characterization and correlation with statistical process control. Note 4: Measured at PRF = -10dBm and output frequency = 1MHz.
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LT5516 TYPICAL PERFOR A CE CHARACTERISTICS
(Test circuit optimized for 900MHz operation as shown in Figure 2) Supply Current vs Supply Voltage
160 140 SUPPLY CURRENT (mA) 120 100 80 60 40 4 4.5 5 SUPPLY VOLTAGE (V) 5.5
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R1 = 8.2
GAIN (dB), NF (dB), IIP3 (dBm)
TA = 85C TA = 25C TA = - 40C
IIP2 vs RF Input Frequency
70 PLO = -10dBm TA = 25C VCC = 5V R1 = 8.2 20 0
60
POUT, IM3 (dBm/TONE)
IIP2 (dBm)
50
40
30
20 800
900 1000 1100 1200 RF INPUT FREQUENCY (MHz)
GAIN MISMATCH (dB)
4
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Conv Gain, NF, IIP3 vs RF Input Frequency
25 PLO = -10dBm TA = 25C VCC = 5V R1 = 8.2 IIP3 15 NF 10
20
5
CONV. GAIN
0 800
900 1000 1100 1200 RF INPUT FREQUENCY (MHz)
1300
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I/Q Output Power, IM3 vs RF Input Power
fLO = 901MHz VCC = 5V R1 = 8.2 OUTPUT POWER -20 IM3 -40 TA = - 40C -60 TA = 85C -80 -100 -18 TA = 25C
1300
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-10 -6 -2 RF INPUT POWER (dBm)
2
6
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I/Q Gain Mismatch vs RF Input Frequency
1.2 0.8 TA = - 40C 0.4 0 TA = 85C -0.4 -0.8 PLO = -10dBm fBB = 1MHz VCC = 5V R1 = 8.2 900 1000 1100 1200 1300 1400 1500 RF INPUT FREQUENCY (MHz)
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TA = 25C
-1.2 800
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LT5516 TYPICAL PERFOR A CE CHARACTERISTICS
(Test circuit optimized for 900MHz operation as shown in Figure 2) I/Q Phase Mismatch vs RF Input Frequency
6 4 18 16 TA = - 40C 2 0 TA = 85C -2 8 -4 PLO = -10dBm fBB = 1MHz VCC = 5V R1 = 8.2 900 1000 1100 1200 1300 1400 1500 RF INPUT FREQUENCY (MHz)
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PHASE MISMATCH (DEG)
TA = 25C
NF (dB)
-6 800
Conv Gain, IIP3 vs LO Input Power
20 TA = 85C
CONV GAIN (dB), IIP3 (dBm)
16 IIP3 12 fLO = 901MHz VCC = 5V R1 = 8.2 CONV GAIN 4
TA = - 40C TA = 25C IIP2 (dBm)
8
TA = - 40C
TA = 85C
0 -14
-12
-10 -8 -6 -4 LO INPUT POWER (dBm)
CONV GAIN (dB), IIP3 (dBm)
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NF vs LO Input Power
fRF = 1300MHz fRF = 1100MHz fRF = 900MHz
14 12 10
6
4 -14
TA = 25C VCC = 5V R1 = 8.2 -12 -10 -8 -6 -4 LO INPUT POWER (dBm) -2
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IIP2 vs LO Input Power
70 65 60 TA = 85C 55 50 45 40 35 TA = - 40C fLO = 901MHz VCC = 5V R1 = 8.2
TA = 25C
TA = 25C
-2
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30 -14
-12
-10 -8 -6 -4 LO INPUT POWER (dBm)
-2
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Conv Gain, IIP3 vs Supply Voltage
20 TA = 85C 16 IIP3 12 fLO = 901MHz PLO = -10dBm R1 = 8.2 CONV GAIN 4 TA = 85C 0 4 4.5 5 SUPPLY VOLTAGE (V) 5.5
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TA = - 40C
TA = 25C
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TA = 25C TA = - 40C
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LT5516 TYPICAL PERFOR A CE CHARACTERISTICS
(Test circuit optimized for 900MHz operation as shown in Figure 2) LO-RF Leakage vs LO Input Power
-55 TA = 25C VCC = 5V R1 = 8.2 fRF = 900MHz -65 fRF = 1300MHz -70 fRF = 1100MHz -75 RF-LO ISOLATION (dB) 80 fRF = 1100MHz 70 fRF = 1300MHz 60 fRF = 900MHz 50 40 30 TA = 25C VCC = 5V R1 = 8.2 -10 -5 0 5 RF INPUT POWER (dBm) 10
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-60
LO-RF LEAKAGE (dBm)
-80 -14
-12
-10 -8 -6 -4 LO INPUT POWER (dBm)
RF, LO Port Return Loss vs Frequency
0 -5 RETURN LOSS (dB) -10 LO -15 -20 -25 -30 0 TA = 25C VCC = 5V R1 = 8.2 0.5 1 1.5 FREQUENCY (GHz) 2 2.5
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CONV GAIN (dB)
Conv Gain, NF, IIP3 vs R1
25 SUPPLY CURRENT (mA), IIP2 (dBm) TA = 25C VCC = 5V IIP3 15 NF 10 CONV GAIN PLO = -5dBm fLO = 901MHz 150 130 110 90 70
GAIN (dB), NF (dB), IIP3 (dBm)
20
5
0
3
4
5
6 R1 ()
6
UW
RF 7
RF-LO Isolation vs RF Input Power
-2
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20 -15
Conv Gain vs Baseband Frequency
8 6 4 TA = 85C 2 TA = 25C 0 -2 -4 fLO = 1000MHz VCC = 5V R1 = 8.2 0.1 1 10 100 BASEBAND FREQUENCY (MHz) 1000
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TA = - 40C
Supply Current, IIP2 vs R1
TA = 25C VCC = 5V SUPPLY CURRENT PLO = -5dBm fLO = 901MHz
IIP2 50 30
8
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4
5
6 R1 ()
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PI FU CTIO S
GND (Pins 1, 4): Ground Pin. RF +, RF - (Pins 2, 3): Differential RF Input Pins. These pins are internally biased to 1.54V. They must be driven with a differential signal. An external matching network is required for impedance transformation. VCC (Pins 5, 8, 9, 12): Power Supply Pins. These pins should be decoupled using 1000pF and 0.1F capacitors. VCM (Pin 6): Common Mode and DC Return for the I-Mixer and Q-Mixer. An external resistor must be connected between this pin and ground to set the dc bias current of the I/Q demodulator. EN (Pin 7): Enable Pin. When the input voltage is higher than 1.6V, the circuit is completely turned on. When the input voltage is less than 1.3V, the circuit is turned off. LO +, LO - (Pins 10, 11): Differential Local Oscillator Input Pins. These pins are internally biased to 2.44V. They can be driven single-ended by connecting one to an AC ground through a 1000pF capacitor. However, differential input drive is recommended to minimize LO feedthrough to the RF input pins. QOUT-, QOUT+ (Pins 13, 14): Differential Baseband Output Pins of the Q-Channel. The internal DC bias voltage is VCC -0.68V for each pin. IOUT-, IOUT+ (Pins 15, 16): Differential Baseband Output Pins of the I-Channel. The internal DC bias voltage is VCC -0.68V for each pin. GROUND (Pin 17, Backside Contact): Ground Return for the Entire IC. This pin must be soldered to the printed circuit board ground plane.
BLOCK DIAGRA
VCM 6 Q-MIXER BIAS 7 EN 1 4 17 10 LO + 11 LO -
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VCC 5
VCC 8
VCC 9
VCC 12 I-MIXER LPF 16 IOUT+ 15 IOUT- LO BUFFERS 0/90
RF AMP RF + 2 RF - 3 LPF
14 QOUT+ 13 QOUT-
GND GND
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LT5516
TEST CIRCUITS
J3 IOUT- J5 QOUT+
J4 IOUT+
J6 QOUT-
IOUT +
IOUT -
QOUT +
RF 2 6 1 4 C1 1nF L1 33nH
QOUT -
T1 J1 LDB31900M20C-416 GND RF + RF
-
T2 LDB31900M20C-416 J2 VCC LO - LO + VCC C5 1nF C2 1nF VCC R3 1k EN L4 27nH LO 6 1 4 2
LT5516
3
GND VCM VCC VCC EN
3
C7 1nF
R1 8.2
R2 100k
C6 1nF
C3 0.1F
C4 2.2F
REFERENCE DESIGNATION C1,C2,C5,C6,C7 C3 C4 L1 L4 R1 R2 R3 T1, T2
VALUE 1nF 0.1F 2.2F 33nH 27nH 8.2 100k 1k 1:4
SIZE 0402 0402 3216 0402 0402 0402 0402 0402
PART NUMBER AVX 04025C102JAT AVX 0402ZD104KAT AVX TPSA225M010R1800 Murata LQP10A Murata LQP10A
Murata LDB31900M20C-416
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Figure 2. 900MHz Evaluation Circuit Schematic
Figure 3. Component Side Silkscreen of Evaluation Board
Figure 4. Component Side Layout of Evaluation Board
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LT5516
APPLICATIO S I FOR ATIO
The LT5516 is a direct I/Q demodulator targeting high linearity receiver applications, including wireless infrastructure. It consists of an RF amplifier, I/Q mixers, a quadrature LO carrier generator and bias circuitry. The RF signal is applied to the inputs of the RF amplifier and is then demodulated into I/Q baseband signals using quadrature LO signals. The quadrature LO signals are internally generated by precision 90 phase shifters. The demodulated I/Q signals are lowpass filtered internally with a -3dB bandwidth of 265MHz. The differential outputs of the I-channel and Q-channel are well matched in amplitude; their phases are 90 apart. RF Input Port Differential drive is highly recommended for the RF inputs to minimize the LO feedthrough to the RF port and to maximize gain. (See Figure 2.) A 1:4 transformer is used on the demonstration board for wider bandwidth matching. To assure good NF and maximize the demodulator gain, a low loss transformer is employed. Shunt inductor L1, with high resonance frequency, is required for proper impedance matching. Single-ended to differential conversion can also be implemented using narrow band, discrete L-C circuits to produce the required balanced waveforms at the RF + and RF - inputs.The differential impedance of the RF inputs is listed in Table 1.
Table 1. RF Input Differential Impedance
FREQUENCY (MHz) 800 900 1000 1100 1200 1300 1400 1500 DIFFERENTIAL INPUT IMPEDANCE () 258.7-j195.2 239.9-j181.8 224.1-j170.0 210.9-j160.0 200.7-j152.1 191.4-j144.7 183.2-j138.3 176.5-j133.1 DIFFERENTIAL S11 MAG 0.779 0.766 0.753 0.740 0.729 0.718 0.707 0.698 ANGLE () -16.9 -18.3 -19.6 -20.9 -21.9 -23.0 -24.0 -24.9
The RF+ and RF- inputs (Pins 2, 3) are internally biased at 2.44V. These two pins should be DC blocked when connected to ground or other matching components. The RF input equivalent circuit is shown in Figure 5.
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An external resistor (R1) is connected to Pin 6 (VCM) to set the optimum DC current for I/Q mixer linearity. The IIP3 can be improved with a smaller R1 at a price of slightly higher NF and ICC. The RF performances of NF, IIP3 and IIP2 vs R1 are shown in the Typical Performance Characteristics. LO Input Port The LO inputs (Pins 10,11) should be driven differentially to minimize LO feedthrough to the RF port. This can be accomplished by means of a single-ended to differential conversion as shown in Figure 2. L4, the 27nH shunt inductor, serves to tune out the capacitive component of the LO differential input. The resonance frequency of the inductor should be greater than the operating frequency. A 1:4 transformer is used on the demo board to match the 200 on-chip resistance to a 50 source. Figure 6 shows the LO input equivalent circuit and the associated matching network. Single-ended to differential conversion at the LO inputs can also be implemented using a discrete L-C circuit to produce a balanced waveform without a transformer. An alternative solution is a simple single-ended termination. However, the LO feedthrough to RF may be degraded. Either LO + or LO - input can be terminated to a 50 source with a matching circuit, while the other input is connected to ground through a 100pF bypass capacitor. Table 2 shows the differential input impedance of the LO input port.
Table 2. LO Input Differential Impedance
FREQUENCY (MHz) 800 900 1000 1100 1200 1300 1400 1500 DIFFERENTIAL INPUT IMPEDANCE () 134.7-j65.1 128.5-j66.7 121.8-j67.5 115.7-j67.2 109.3-j66.1 103.0-j64.4 96.7-j62.1 91.0-j59.4 DIFFERENTIAL S11 MAG 0.552 0.517 0.512 0.505 0.498 0.490 0.480 0.469 ANGLE () -22.5 -25.4 -28.5 -31.8 -35.0 -38.3 -42.0 -45.8
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APPLICATIO S I FOR ATIO
I-Channel and Q-Channel Outputs Each of the I-channel and Q-channel outputs is internally connected to VCC though a 60 resistor. The output dc bias voltage is VCC - 0.68V. The outputs can be DC coupled or AC coupled to the external loads. The differential output impedance of the demodulator is 120 in parallel with a 5pF internal capacitor, forming a lowpass filter with a -3dB corner frequency at 265MHz. RLOAD (the singleended load resistance) should be larger than 600 to assure full gain. The gain is reduced by 20 * log(1 + 120/ RLOAD) in dB when the differential output is terminated by RLOAD. For instance, the gain is reduced by 6.85dB when each output pin is connected to a 50 load (100 differential load). The output should be taken differentially (or by using differential-to-single-ended conversion) for best RF performance, including NF and IM2.
J1 RF
T1 LDB31900M20C-416 2 2 6 1 4 3 C1 1nF L1 33nH
3
Figure 5. RF Input Equivalent Circuit with External Matching
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The phase relationship between the I-channel output signal and Q-channel output signal is fixed. When the LO input frequency is larger (or smaller) than the RF input frequency, the Q-channel outputs (QOUT+, QOUT-) lead (or lag) I-channel outputs (IOUT+, IOUT-) by 90. When AC output coupling is used, the resulting highpass filter's -3dB roll-off frequency is defined by the R-C constant of the blocking capacitor and RLOAD, assuming RLOAD > 600. Care should be taken when the demodulator's outputs are DC coupled to the external load, to make sure that the I/Q mixers are biased properly. If the current drain from the outputs exceeds 6mA, there can be significant degradation of the linearity performance. Each output can sink no more than 13mA when the outputs are connected to an external load with a DC voltage higher than VCC - 0.68V. The I/Q output equivalent circuit is shown in Figure 7.
LT5516 VCC RF + 1.54V 1k RF
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APPLICATIO S I FOR ATIO
VCC T2 LDB31900M20C-416 10 2 6 1 4 11 C2 1nF L4 27nH LO
-
J2 LO
LO
+
2.44V
200
3
2.44V 5pF
Figure 6. LO Input Equivalent Circuit with External Matching
PACKAGE DESCRIPTIO
UF Package 16-Lead Plastic QFN (4mm x 4mm)
(Reference LTC DWG # 05-08-1692)
4.35 0.05 2.15 0.05 2.90 0.05 (4 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW--EXPOSED PAD 4.00 0.10 (4 SIDES) PIN 1 TOP MARK 1 2.15 0.10 (4-SIDES) 2 0.75 0.05 R = 0.115 TYP 0.55 0.20 15 16
NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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VCC 60 60 60 60 IOUT+ IOUT- 5pF QOUT
+
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16 15 14 13
QOUT-
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Figure 7. I/Q Output Equivalent Circuit
0.72 0.05
PACKAGE OUTLINE 0.30 0.05 0.65 BSC
(UF) QFN 0802
0.200 REF 0.00 - 0.05
0.30 0.05 0.65 BSC
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LT5516
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
LT/TP 0503 1K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2003

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