![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
SM6453AB NIPPON PRECISION CIRCUITS INC. 3-wire Serial Data Volume Control for Headphone Amplifiers IC OVERVIEW FEATURES I I I I I I I I I I I I ORDERING INFORMATION Device SM6453AB pre lim Package 32-pin QFN 2 stereo system inputs, 1 output system 12mW + 12mW output (standard, 16 load, 2.0V supply voltage) Attenuation function * 1.0dB step width * 80-step * + 12 to - 68dB variable range Mute function Low current consumption (2.3mA total, 2.4V supply voltage) 12dB voltage gain Bass boost function (2 boost characteristics controlled by external RC network) Auto gain control function (AGC) Beep sound input/output circuit Power-down function 1.9 to 3.6V operating supply voltage range Silicon-gate CMOS process PACKAGE DIMENSIONS (Unit: mm) 32-pin QFN AVDD1 LIN1 LIN2 AVSS1 RIN1 RIN2 VBIAS ina ry PINOUT (Top view) DVDD1 DVDD2 DVSS LRMXO AGCTC BSTC BSTN MLEN MCK MDT RSTN MUTEN PDN BEEPI VREF1 VREF2 1 2 3 4 5 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 6 7 8 9 17 10 11 12 13 14 15 16 The SM6453AB is a 3-wire serial data volume control for headphone amplifiers with built-in electronic volume control. Two switchable input systems are supported. It features bass boost function, auto gain control function (AGC), power-down function, and beep input, making it ideal for use in portable electronic products. BSTO BEEPLO LOUT AVSS2 AVDD2 AVDD3 AVSS3 ROUT BEEPRO TBD NIPPON PRECISION CIRCUITS--1 SM6453AB PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 Name MLEN MCK MDT RSTN MUTEN PDN BEEPI VREF1 VREF2 AVDD1 LIN1 LIN2 AVSS1 RIN1 RIN2 VBIAS BEEPRO ROUT I/O1 Ip Ip Ip Ip I I I O O - I I - I I O O O - - Description Microcontroller latch enable input Microcontroller clock input Microcontroller data input System reset (LOW-level reset) Mute input (LOW-level mute) VDD Power-down mode select (LOW-level power-down) Beep signal input Reference voltage 1 Reference voltage 2 EVR-stage analog VDD Left-channel analog input 1 Left-channel analog input 2 EVR-stage analog VSS Right-channel analog input 1 Right-channel analog input 2 EVR-stage bias voltage Right-channel beep signal output Right-channel output AVSS3 lim - - LOUT O Left-channel output O BSTO BSTN BSTC O I Bass boost auxiliary output Bass boost auxiliary input O O O - - DVSS Digital VSS Digital VDD2 Digital VDD1 - Headphone amplifier right-channel analog VSS Headphone amplifier right-channel analog VDD AVDD3 AVDD2 AVSS2 Headphone amplifier left-channel analog VDD Headphone amplifier left-channel analog VSS BEEPLO Left-channel beep signal output Bass boost capacitor connection pre AGCTC LRMXO 30 31 32 DVDD2 DVDD1 1. Ip = input with pull-up VDD1, VDD2, VSS definition: VDD1 = DVDD2 = AVDD1 = AVDD2 = AVDD3 VDD2 = DVDD1 VSS = DVSS = AVSS1 = AVSS2 = AVSS3 AGC time constant capacitor connection Left + right-channel mix detector output ina ry VDD2 VDD1 VDD2 NIPPON PRECISION CIRCUITS--2 SM6453AB BLOCK DIAGRAM VDD1 1F 22F VREF1 LRMXO AGCTC DVDD1 DVDD2 DVSS 0.1F 27 BSTN BSTC 26 32 MLEN 1 31 Microcontroller Interface Level Shifter MCK 2 MDT 3 RSTN 4 EVR MUTEN VDD2 5 VDD2 PDN 6 EVR BEEPI 7 lim VREF1 VREF1 8 VREF2 9 VREF2 10 11 LIN1 RIN1 AVSS1 RIN2 LIN2 AVDD1 10F 10F + + 10F + 10F 10F 10F 10F + 10F VDD1 pre NIPPON PRECISION CIRCUITS--3 VBIAS ina ry 30 29 28 25 BSTO BST + AGC 24 BEEPLO HPA 23 LOUT 220F + 0.47F 22 AVSS2 16 40k 40k 10 1.6k 1.6k 21 AVDD2 + 220F VDD1 HPA 20 AVDD3 VDD1 + 220F 19 AVSS3 0.47F + 10 BEEP 18 ROUT 220F 17 BEEPRO 15 16 16 Selector 13 12 14 SM6453AB SPECIFICATIONS Absolute Maximum Ratings Parameter Supply voltage Digital system input voltage Analog system input voltage Storage temperature Symbol VDD1, VDD2 VSS VIND VINA TSTG Rating - 0.3 to 4.6 0 DVSS - 0.3 to VDD1 + 0.3 AVSS - 0.3 to VDD2 + 0.3 - 55 to 125 Unit V V V V Recommended Operating Conditions VSS = DVSS = AVSS1 = AVSS2 = AVSS3 = 0V, VDD1 = DVDD2 = AVDD1 = AVDD2 = AVDD3, VDD2 = DVDD1 Parameter Supply voltage 1 Supply voltage 2 Operating temperature Symbol VDD1 VDD2 TOPR Conditions 1.9 to 3.6 1.9 to 3.6 Unit V V Voltages between DVDD2, AVDD1, AVDD2, AVDD3 should be less 0.1V. pre NIPPON PRECISION CIRCUITS--4 lim ina ry C - 40 to 85 C SM6453AB DC Characteristics AVSS1 = AVSS2 = AVSS3 = DVSS = 0V, AVDD1 = AVDD2 = AVDD3 = DVDD2 = 1.9 to 3.6V, DVDD1 = 1.9 to 3.6V Rating Parameter Pins Symbol IDDD1A IDDD1S DVDD2 IDDD2A IDDD2S AVDD1 Current consumption AVDD2 IDDA1A IDDA1S IDDA2A IDDA2S IDDA2T Condition min (Note 1) (Note 2) (Note 1) (Note 2) (Note 1) (Note 2) (Note 1) (Note 2) (Note 3) (Note 1) (Note 2) DVDD1 typ 0.01 0.2 max 0.02 1.0 mA A Unit IDDA3A AVDD3 IDDA3S IDDA3T H-level Input voltage 1 (*1) L-level H-level L-level Input voltage 2 (*2) lim VIL2 H-level L-level (*3) VIH3 VIL3 (*1) IIL1 VIN = 0V (*3) IIH1 VIN = VDD1 VIN = VDD1 VIN = 0V VIN = 0V VIN = VDD1 (*1) (*2) IIH2 IIL2 (*2) IIH3 IIL3 (*3) Digital signal inputs (with pull-up) MLEN, MDT, MCK, RSTN Analog input 1 MUTEN, PDN Analog input 2 BEEPI Input voltage 3 Input current 1 Input current 2 Input leakage current 1 Input leakage current 2 Input leakage current 3 Input leakage current 4 pre Pin types (*1) Function Name Function Name (*2) Function Name (*3) (Note 1) MUTEN = H-level, PDN = H-level, Analog input = - dBv, ATT = 0dB, Microcontroller clock frequency = 4MHz, data transfer from microcontroller (Note 2) MUTEN = L-level, PDN = L-level, Analog input = - dBv, ATT = 0dB, data transfer from microcontroller stopped, Pins (*1) = VDD2 (Note 3) MUTEN = H-level, PDN = H-level, reference voltage = Measurement circuit, Bass boost = OFF, AGC = OFF, Frequency = 1kHz, PO = 0.5mW + 0.5mW ina ry 0.30 0.2 TBD 1.0 0.84 1.26 TBD 0.68 25.0 1.02 TBD 25.0 TBD 0.68 1.02 TBD 25.0 (Note 3) TBD VIH1 VIL1 0.7xDVDD1 0.3xDVDD1 VIH2 1.0 0.4 1.5 1.0 70 280 150 420 1.0 1.0 1.0 1.0 mA A mA A mA A mA A V V V V V V A A A A A A NIPPON PRECISION CIRCUITS--5 SM6453AB AC Characteristics AVDD1 = AVDD2 = AVDD3 = DVDD1 = DVDD2 = 1.9 to 3.6V, VSS = 0V, Ta = - 40 to 85C, unless otherwise noted. Serial inputs (MDT, MCK, MLEN) Rating Parameter MCK, MLEN rise time MCK, MLEN fall time MDT setup time MDT hold time Setup time Hold time MLEN LOW-level pulsewidth HIGH-level pulsewidth Symbol tr tf Unit ns ns MDT tMDS MCK lim tMCS tMEWL tf 0.9VDD2 0.1VDD2 MLEN MLEN MCK pre Reset input (RSTN) Parameter RSTN LOW-level pulsewidth ina ry min typ max 100 100 tMDS 50 50 50 50 50 50 ns ns ns ns ns ns tMDH tMCS tMCH tMEWL tMEWH 0.5VDD2 tMDH 0.5VDD2 tMCH 0.5VDD2 tMEWH tr 0.9VDD2 0.1VDD2 Rating Symbol min typ max ns Unit 100 tRSTN NIPPON PRECISION CIRCUITS--6 SM6453AB AC Analog Characteristics VDD1 = VDD2 = 2.0V, analog input amplitude = 0.022Vrms, input frequency = 1kHz, Ta = 25C, Measurement circuit, unless otherwise noted. Analog input characteristics (LIN1, RIN1, LIN2, RIN2) Rating Parameter Reference input amplitude Input resistance Input clipping voltage Symbol VAI RIN VCLP Condition Unit ATT = 0dB ATT = 0dB Analog output characteristics (LOUT, ROUT) Parameter Residual noise voltage Total harmonic distortion + noise Maximum output voltage Bass boost response1 AGC detection level Gain control range Step size Symbol VNS THD + N POMAX BBST VAGC RCNT STEP ATT = 0dB PO = 0.5mW + 0.5mW ina ry min typ max 0.022 51 45 57 0.14 0.168 Rating typ 20 Condition min max 30 0.3 20 0.8 15 + 13.5 0.55+ 0.5VDD1 - 68 0.8 12 1.0 1.8 TBD TBD 0.2 0.5 + 12.0 - 8.0 - 28.0 - 48.1 - 68.2 - 84.0 - 84.0 - 24.0 69.0 - 90.0 - 90.0 - 40.0 75.0 TBD TBD Rating Condition min 0.3 - 56 typ 0.36 - 51.3 max 0.4 - 46 Vrms k Vrms Unit Vrms % ATT = 0dB, THD = 10% mW dB V dB lim ERR1 ERR2 AT0 AT2 @ 12dB to - 48dB ATT = 0dB @ - 49dB to - 68dB ATT = - 20dB ATT = - 40dB ATT = - 60dB ATT = - 80dB AT4 AT6 AT8 MUTE CT1 CT2 PSRR Symbol IBO VBO 400Hz rectangular wave, input level = 1.5V to VDD2 dB dB dB dB dB dB dB dB dB dB dB Attenuation error (1kHz to 20kHz) Absolute attenuation (1kHz) Mute factor (1kHz) Channel crosstalk2 Channel crosstalk3 Ripple rejection ATT = MUTE, MUTEN = LOW pre Parameter BEEP output current BEEP output voltage Supply ripple on AVDD1, AVDD2, AVDD3 dB 1. Bass boost control bit D9 = HIGH, 55Hz, VO = - 30dBv 2. ATT = 0dB, leakage output on one channel with analog input on the other channel only. 3. Bass boost control bit D9 = HIGH, ATT = 0dB, leakage output on one channel with analog input on the other channel only. Analog output characteristics (BEEPLO, BEEPRO) Unit mA dBv NIPPON PRECISION CIRCUITS--7 SM6453AB Reference voltage characteristics (VREF1, VREF2, VBIAS) Rating Parameter Reference voltage output 1 Reference voltage output 2 Bias voltage output Symbol VREF1 VREF2 VBIAS 0.45VDD1 Condition min 0.45VDD1 typ 0.5VDD1 VDD1 - 0.815 0.5VDD1 0.55VDD1 max 0.55VDD1 V V V Unit Measurement circuit 32 31 DVDD1 DVDD2 1 MLEN 2 MCK 3 MDT lim 4 RSTN 5 MUTEN 6 PDN 7 BEEPI 8 VREF1 9 VREF2 AVDD1 10 LIN1 LIN2 VDD2 NPC SM6453 AVDD2 21 + VDD2 pre 11 10F 10F 10F + + 10F 10F 10F VDD1 ina ry VDD1 VREF1 0.1F 1F 30 29 22F + 28 27 26 DVSS LRMXO AGCTC BSTC BSTN BSTO 25 BEEPLO 24 LOUT 23 220F + 16 0.47F AVSS2 22 10 220F VDD1 AVDD3 20 + VDD1 220F AVSS3 19 0.47F 10 ROUT 18 + 220F BEEPRO 17 16 AVSS1 13 10F + RIN1 14 RIN2 15 VBIAS 16 12 + 10F NIPPON PRECISION CIRCUITS--8 SM6453AB FUNCTIONAL DESCRIPTION Microcontroller Interface The SM6453AB uses a serial microcontroller interface comprising MDT (data), MCK (clock), MLEN (latch enable). Data format The data transfer format is shown in figure 1. MDT D15 D14 D13 D12 D11 D10 D9 MCK MLEN Figure 1. Microcontroller data input timing pre NIPPON PRECISION CIRCUITS--9 lim The internal shift register shifts data on the rising edge of MCK, and the data is loaded and updated on the rising edge of MLEN (the dotted lines are all valid data timing). Each cycle is completed by 16 or more MCK input cycles, even if there are unused data bits. ina ry D8 D7 D6 D5 D4 D3 D2 D1 D0 SM6453AB Microcontroller data description "L" = VIL1 level, "H" = VIH1 level I I D15 to D12: Not used (Don't Care) bits. Can be either "L" or "H". D11: AGC bit. OFF when "L", and ON when "H". D11 L H AGC function OFF ON I D10, D9: Bass boost control bit. D9 L D10 L H L H H I D8: Input select bit. LIN1 and RIN1 when "L", and LIN2 and RIN2 when "H". D8 L H Selected inputs LIN1, RIN1 LIN2, RIN2 Amp gain + 12dB + 11dB + 10dB : - 3dB - 4dB - 5dB : - 52dB - 53dB - 54dB : lim EVR ATT value 0dB - 1dB - 2dB : D7 L D6 L D5 L L L : L L : L L : - 15dB L L L - 16dB : L L L - 17dB - 63dB L : L : L : L L L : L H L L : L L L L : H H - 64dB - 65dB : - 79dB MUTE MUTE MUTE MUTE H H : H H H H : H H L - 80dB L L L : H H MUTE I D7 to D0: Attenuation (ATT) bits. ina ry Bass boost characteristics OFF BB1 BB2 D4 L L L : L H H : H L L : L H H H : H H D3 L L L : H L L : H L L : H L L L : H H D2 L L L : H L L : H L L : H L L L : H H D1 L L H : H L L : H L L : H L L H : H H D0 L H L : H L H : H L H : H L H L : L H HEX 00 01 02 : 0F 10 11 : 3F 40 41 : 4F 50 51 52 : FE FF NIPPON PRECISION CIRCUITS--10 pre - 67dB MUTE - 68dB MUTE MUTE MUTE MUTE Note: At system reset, AGC = OFF, bass boost = OFF, LIN1 and RIN1 input, MUTE are selected. SM6453AB Bass Boost Function (BSTO, BSTN, BSTC) Using the bass boost function, the left-channel and right-channel bass components are sampled and amplified, or boosted, and added to the headphone driver amplifier. The connection of 0.1F (std) capacitor to BSTC forms a lowpass filter. The bass boost response can also be selected using bit D12. Usually there is no component connected to BSTO and BSTN, however, the boost response characteristic can be modified by connecting a resistor and capacitor between BSTO and BSTN. pre NIPPON PRECISION CIRCUITS--11 lim ina ry SM6453AB Auto-gain Control The output clip level margin is increased when bass boost is ON. Mute Function (MUTEN) Mute is ON when MUTEN = "L". The mute setting is also controlled by microcontroller data. A pull-down resistor can be added to prevent malfunction. Power-down Function (PDN) Power-down function is ON when PDN="L". A pull-down resistor can be added to prevent malfunction. Beep Signal Input/Output (BEEPI, BEEPLO, BEEPRO) The beep output circuit operates when MUTEN = "L". The beep output is a fixed-current output on BEEPLO and BEEPRO. NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: +81-3-3642-6661 Facsimile: +81-3-3642-6698 http://www.npc.co.jp/ Email: sales@npc.co.jp NP0024AE 2001.02 pre NIPPON PRECISION CIRCUITS INC. lim NIPPON PRECISION CIRCUITS--12 ina ry The output level from the bass boost circuit can be controlled to prevent the output from exceeding a value VREF1 [V] + 0.55 [Vpeak]. |
Price & Availability of SM6453AB
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |