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| DP84240 DP84244 Octal TRI-STATE MOS Drivers March 1986 DP84240 DP84244 Octal TRI-STATE MOS Drivers General Description The DP84240 and DP84244 are octal TRI-STATE drivers which are designed for heavy capacitive load applications such as fast data buffers or as memory address drivers The DP84240 is an inverting driver which is pin-compatible with both the 74S240 and AM2965 The DP84244 is a non-inverting driver which is pin-compatible with the 74S244 and AM2966 These parts are fabricated using an oxide isolation process for much faster speeds and are specified for 250 pF and 500 pF load capacitances TRI-STATE is a registered trademark of National Semiconductor Corp Features Y Y Y Y Y Y Y Y tpd specified with 250 pF and 500 pF loads Output specified from 0 8V to 2 7V Designed for symmetric rise and fall times at 500 pF Outputs glitch free at power up and power down PNP inputs reduce DC loading on bus lines Low static and dynamic input capacitance Low skew times between edges and pins AC parameters specified with all outputs switching simultaneously Connection Diagram Truth Table DP84240 Inputs G H L L H e High Level L e Low Level X e Don't Care Z e High Impedance TL F 5219 - 1 A X L H Outputs Y Z H L Top View Order Number DP84240J or DP84240N See NS Package Numbers J20A or N20A DP84244 Inputs G H L L A X L H Outputs Y Z L H TL F 5219 - 2 Top View Order Number DP84244J or DP84244N See NS Package Numbers J20A or N20A C1995 National Semiconductor Corporation TL F 5219 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage VCC Logical ``1'' Input Voltage Logical ``0'' Input Voltage Storage Temperature Range Power Dissipation Cavity Package Molded Package Lead Temperature (soldering 10 sec ) 7 0V 7 0V b 1 5V b 65 C to a 150 C 1150 mW 1300 mW 300 C Operating Conditions VCC Supply Voltage TA Ambient Temperature Min 45 0 Max 55 a 70 Units V C Electrical Characteristics VCC e 5V g10% Symbol VIN(1) VIN(0) IIN(1) Parameter Logical ``1'' Input Voltage Logical ``0'' Input Voltage Logical ``1'' Input Current VIN e 2 7V VIN e 7 0V IIN(0) VCLAMP VOH VOL I1D I0D Hi-Z ICC Logical ``0'' Input Current Input Clamp Voltage Logical ``1'' Output Voltage Logical ``0'' Output Voltage Logical ``1'' Drive Current Logical ``0'' Drive Current TRI-STATE Output Current Supply Current DP84240 0 s TA s 70 C (Notes 2 and 3 ) Min 20 08 01 20 100 b 50 b1 b 200 b1 2 Conditions Typ Max Units V V mA mA mA V V 0 s VIN s 0 4V IIN e b18 mA IOH e b100 mA IOH e b1 mA IOL e 10 mA IOL e 12 mA VOUT e 1 5V VOUT e 1 5V 0 4V s VOUT s 2 7V All Outputs Open All Outputs High All Outputs Low All Outputs Hi-Z All Outputs High All Outputs Low All Outputs Hi-Z b 75 a 100 b 100 VCC - 1 15 VCC b1 5 43 39 02 03 b 250 a 150 a 100 04 05 V mA mA mA 16 74 80 40 100 115 50 125 125 75 130 150 mA DP84244 Note 1 ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed Except for ``Operating Temperature Range'' they are not meant to imply that the devices should be operated at these limits The table of ``Electrical Characteristics'' provides conditions for actual device operation Note 2 All currents into device pins shown as positive all currents out of device pins shown as negative all voltages referenced to ground unless otherwise noted All values shown as max or min are on an absolute value basis Note 3 Typical characteristics are taken at VCC e 5 0V and TA e 25 C Note 4 The output-to-output skew is primarily a function of the number of outputs switching and the capacitive loading on those outputs See Figures 5 and 6 for the switching time variations 2 Switching Characteristics VCC e 5V g10% 0 s TA s 70 C all outputs loaded with specified load capacitance and all eight outputs switching simultaneously (Note 3 ) Symbol tPLH tPHL tPLZ tPHZ tPZL tPZH tSKEW Parameter Propagation Delay from LOW-to-HIGH Output Propagation Delay from HIGH-to-LOW Output Output Disable Time from LOW Output Disable Time from HIGH Output Enable Time to LOW Output Enable Time to HIGH Output-to-Output Skew (Note 4) Conditions Min 9 10 9 12 Typ 16 20 16 20 11 12 30 23 3 Max 27 33 25 31 24 24 45 35 Units ns ns ns ns ns ns ns Figures 1 3 CL e 250 pF CL e 500 pF CL e 250 pF CL e 500 pF Figures 2 Figures 2 Figures 2 Figures 2 Figures 1 4 S e 1 CL e 50 pF 4 S e 2 CL e 50 pF 4 S e 1 CL e 500 pF 4 S e 2 CL e 500 pF 3 CL e 500 pF Capacitance TA e 25 C f e 1 MHz VCC e 5V g10% (Note 3 ) Parameter CIN COUT Conditions All Other Inputs Tied Low Output in TRI-STATE Mode Typ 6 20 Units pF pF Note 1 ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed Except for ``Operating Temperature Range'' they are not meant to imply that the devices should be operated at these limits The table of ``Electrical Characteristics'' provides conditions for actual device operation Note 2 All currents into device pins shown as positive all currents out of device pins shown as negative all voltages referenced to ground unless otherwise noted All values shown as max or min are on an absolute value basis Note 3 Typical characteristics are taken at VCC e 5 0V and TA e 25 C Note 4 The output-to-output skew is primarily a function of the number of outputs switching and the capacitive loading on those outputs See Figures 5 and 6 for the switching time variations 3 Switching Test Circuits TL F 5219 - 3 TL F 5219 - 4 CL INCLUDES PROBE AND JIG CAPACITANCES FIGURE 1 Capacitive Load Switching FIGURE 2 TRI-STATE Enable Disable Typical Switching Characteristics Voltage Waveforms TL F 5219 - 5 TL F 5219 - 6 FIGURE 3 Output Drive Levels FIGURE 4 TRI-STATE Control Levels TL F 5219 - 7 TL F 5219 - 8 FIGURE 5 tPLH Measured to 2 7V on Output vs CL FIGURE 6 tPHL Measured to 0 8V on Output vs CL 4 Typical Switching Characteristics (Continued) TL F 5219 - 9 TL F 5219 - 10 FIGURE 7 Typical Power Dissipation for DP84240 at VCC e 5 5V (All 8 drivers switching simultaneously) FIGURE 8 Typical Power Dissipation for DP84244 at VCC e 5 5V (All 8 drivers switching simultaneously) Typical Application DP84244 used as a buffer in a large memory array (greater than 88 dynamic RAMs) TL F 5219 - 11 5 DP84240 DP84244 Octal TRI-STATE MOS Drivers Physical Dimensions inches (millimeters) 20-Lead Dual-In-Line Package (J) Order Number DP84240J DP84244J NS Package Number J20A LIFE SUPPORT POLICY 20-Lead Dual-In-Line Package (N) Order Number DP84240N DP84244N NS Package Number N20A NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications |
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